參數(shù)資料
型號(hào): H5MS5162DFR-K3M
廠商: HYNIX SEMICONDUCTOR INC
元件分類: DRAM
英文描述: 32M X 16 DDR DRAM, 0.5 ns, PBGA60
封裝: 8 X 10 MM, 1 MM HEIGHT, 0.80 MM PITCH, HALOGEN FREE AND LEAD FREE, FBGA-60
文件頁數(shù): 37/62頁
文件大?。?/td> 1314K
代理商: H5MS5162DFR-K3M
Rev 1.3 / Apr. 2009
42
11
Mobile DDR SDRAM 512Mbit (32M x 16bit)
H5MS5162DFR Series
WRITE to READ
Data for any Write burst may be followed by a subsequent READ command. To follow a Write without truncating the
write burst, tWTR should be met as shown in Figure.
Data for any Write burst may be truncated by a subsequent READ command as shown in Figure. Note that the only
data-in pairs that are registered prior to the tWTR period are written to the internal array, and any subsequent data-in
must be masked with DM.
/CLK
CLK
WRITE
NOP
BA,
Col
b
Don't Care
1) DI
b = Data In to column b . 3 subsequent elements of Data In are applied in the programmed order following DI b.
2) A non-interrupted burst of 4 is shown.
3) tWTR is referenced from the positive clock edge after the last Data In pair.
4) A10 is LOW with the WRITE command (Auto Precharge is disabled)
5) The READ and WRITE commands are to the same device but not necessarily to the same bank.
Command
Address
DQS
DQ
READ
DM
tDQSS
max
BA,
Col
n
tWTR
CL=3
NOP
Di
b
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