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參數(shù)資料
| 型號： | H5MS5162DFR-K3M |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | DRAM |
| 英文描述： | 32M X 16 DDR DRAM, 0.5 ns, PBGA60 |
| 封裝： | 8 X 10 MM, 1 MM HEIGHT, 0.80 MM PITCH, HALOGEN FREE AND LEAD FREE, FBGA-60 |
| 文件頁數(shù)： | 15/62頁 |
| 文件大?。?/td> | 1314K |
| 代理商： | H5MS5162DFR-K3M |
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Rev 1.3 / Apr. 2009
22
11
Mobile DDR SDRAM 512Mbit (32M x 16bit)
H5MS5162DFR Series
DC CHARACTERISTICS
Parameter
Symbol
Test Condition
Max
Unit Note
DDR
400
DDR
370
DDR
333
DDR
266
DDR
200
Operating one bank
active-precharge current
IDD0
tRC = tRC(min); tCK = tCK(min); CKE is HIGH;
CS is HIGH between valid commands; address
inputs are SWITCHING; data bus inputs are
STABLE
60
55
50
45
mA
1
Precharge power-down
standby current
IDD2P
all banks idle; CKE is LOW; CS is HIGH;
tCK = tCK(min); address and control inputs are
SWITCHING; data bus inputs are STABLE
0.3
mA
Precharge power-down
standby current with clock
stop
IDD2PS
all banks idle; CKE is LOW; CS is HIGH;CK =
LOW; CK = HIGH; address and control inputs
are SWITCHING; data bus inputs are STABLE
0.3
mA
Precharge non power-
down standby current
IDD2N
all banks idle; CKE is HIGH; CS is HIGH, tCK =
tCK(min); address and control inputs are
SWITCHING; data bus inputs are STABLE
12
mA
Precharge non power-
downstandby current with
clock stop
IDD2NS
all banks idle; CKE is HIGH; CS is HIGH; CK =
LOW; CK = HIGH; address and control inputs
are SWITCHING; data bus inputs are STABLE
8
Active power-down
standby current
IDD3P
one bank active; CKE is LOW; CS is HIGH; tCK
= tCK(min); address and control inputs are
SWITCHING; data bus inputs are STABLE
5
mA
Active power-down
standby current with clock
stop
IDD3PS
one bank active; CKE is LOW; CS is HIGH; CK
= LOW; CK = HIGH; address and control inputs
are SWITCHING; data bus inputs are STABLE
3
Active non power-down
standby current
IDD3N
one bank active; CKE is HIGH; CS is HIGH; tCK
= tCK
(min); address and control inputs are
SWITCHING; data bus inputs are STABLE
15
mA
Active non power-down
standby current with clock
stop
IDD3NS
one bank active; CKE is HIGH; CS is HIGH; CK
= LOW; CK = HIGH; address and control inputs
are SWITCHING; data bus inputs are STABLE
10
mA
Operating burst read
current
IDD4R
one bank active; BL=4; CL=3; tCK = tCK
(min);
continuous read bursts; IOUT=0mA; address
inputs are SWITCHING, 50% data change each
burst transfer
110
100
90
80
mA
1
Operating burst write
current
IDD4W
one bank active; BL=4; tCK=tCK
(min);
continuous write bursts; address inputs are
SWITCHING; 50% data change each burst
transfer
100
95
90
80
mA
Auto Refresh Current
IDD5
tRC=tRFC
(min); tCK=tCK(min); burst refresh;
CKE is HIGH; address and control inputs are
SWITCHING; data bus inputs are STABLE
100
mA
Self Refresh Current
IDD6
CKE is LOW; CK=LOW; CK=HIGH;
Extended Mode Register set to all 0's; address
and control inputs are STABLE; data bus inputs
are STABLE
See Next Page
uA
2
Deep Power Down Current
IDD8
Address, control and data bus inputs are
STABLE
10
uA
4
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| H5MS5162DFR-L3M | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:512Mb (32Mx16bit) Mobile DDR SDRAM |
| H5MS5162EFR | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:536,870,912-bit CMOS Low Power Double Data Rate Synchronous DRAM (Mobile DDR SDRAM) |
| H5MS5162EFR-J3M | 制造商:SK Hynix Inc 功能描述:SDRAM MOBILE DDR 512MB (X16) 60FBGA 制造商:SK Hynix Inc 功能描述:SDRAM, MOBILE DDR, 512MB (X16), 60FBGA 制造商:SK Hynix Inc 功能描述:SDRAM, MOBILE DDR, 512MB (X16), 60FBGA, Memory Type:DRAM - Synchronous, Memory C 制造商:SK Hynix Inc 功能描述:SDRAM, MOBILE DDR, 512MB (X16), 60FBGA, Memory Type:DRAM - Synchronous, Memory Configuration:32M x 16, Memory Case Style:FBGA, No. of Pins:60, IC Interface Type:LVCMOS, Operating Temperature Min:-30C, Operating Temperature Max:85C, , RoHS Compliant: Yes |
| H5MS5162FFR-E3M | 制造商:SK Hynix Inc 功能描述: |
| H5N1503P | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Silicon N Channel MOS FET High Speed Power Switching |
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