
Power Consumption Considerations
DSP56321 Technical Data, Rev. 11
Freescale Semiconductor
4-3
Consider all device loads as well as parasitic capacitance due to PCB traces when you calculate 
capacitance. This is especially critical in systems with higher capacitive loads that could create higher 
transient currents in the 
V
CC
 and 
GND
 circuits.
All inputs must be terminated (that is, not allowed to float) by CMOS levels except for the three pins with 
internal pull-up resistors (
TRST
, 
TMS
, 
DE
).
The following pins must be asserted during the power-up sequence: 
RESET
 and 
TRST
. A stable 
EXTAL
signal should be supplied before deassertion of 
RESET
. If the V
CC
 reaches the required level before 
EXTAL is stable or other “required 
RESET
 duration” conditions are met (see 
Table 2-7
), the device 
circuitry can be in an uninitialized state that may result in significant power consumption and heat-up. 
Designs should minimize this condition to the shortest possible duration. 
Ensure that during power-up, and throughout the DSP56321 operation, 
V
CCQH
 is always higher or equal to 
the 
V
CCQL
 voltage level.
If multiple DSP devices are on the same board, check for cross-talk or excessive spikes on the supplies due 
to synchronous operation of the devices.
The Port A data bus (
D[0–23]
), HI08, ESSI0, ESSI1, SCI, and timers all use internal keepers to maintain the 
last output value even when the internal signal is tri-stated. Typically, no pull-up or pull-down resistors 
should be used with these signal lines. However, if the DSP is connected to a device that requires pull-up 
resistors (such as an MPC8260), the recommended resistor value is 10 K
 or less. If more than one DSP 
must be connected in parallel to the other device, the pull-up resistor value requirement changes as 
follows:
— 2 DSPs = 5 K
 (mask sets 0K91M and 1K91M)/7 K
 (mask set 0K93M) or less
— 3 DSPs = 3 K
 (mask sets 0K91M and 1K91M)/4 K
 (mask set 0K93M) or less 
— 4 DSPs = 2 K
 (mask sets 0K91M and 1K91M)/3 K
 (mask set 0K93M) or less 
— 5 DSPs = 1.5 K
 (mask sets 0K91M and 1K91M)/2 K
 (mask set 0K93M) or less
— 6 DSPs = 1 K
 (mask sets 0K91M and 1K91M)/1.5 K
 (mask set 0K93M) or less 
Note:
Refer to 
EB610/D DSP56321/DSP56321T Power-Up Sequencing Guidelines
 for detailed information 
about minimizing power consumption during startup.
4.3  Power Consumption Considerations
Power dissipation is a key issue in portable DSP applications. Some of the factors affecting current consumption 
are described in this section. Most of the current consumed by CMOS devices is alternating current (ac), which is 
charging and discharging the capacitances of the pins and internal nodes. 
Current consumption is described by this formula:
Equation 3:  
Where:
C 
V 
f
=
=
=
node/pin capacitance
voltage swing 
frequency of node/pin toggle
Example 4-1.   
Current Consumption
For a Port A address pin loaded with 50 pF capacitance, operating at 3.3 V, with a 66 MHz clock, toggling at its maximum possible rate (33 
MHz), the current consumption is expressed in 
Equation 4
.
I
C
V
f
×
×
=