
DSP56321 Technical Data, Rev. 11
2-4
Freescale Semiconductor
Specifications
2.4.2
External Clock Operation
The DSP56321 system clock is derived from the on-chip oscillator
or is externally supplied. To use the on-chip 
oscillator, connect a crystal and associated resistor/capacitor components to EXTAL and XTAL; an example is 
shown in
Figure 2-1
. 
Internal clock low period
With DPLL disabled
With DPLL enabled
T
L
—
0.49 
×
 T
C
ET
C
—
—
0.51 
×
 T
C
Note:
Ef = External frequency; MF = Multiplication Factor = MFI + MFN/MFD; PDF = Predivision Factor; 
DF = Division Factor; T
C
 = Internal clock cycle; ET
C
 = External clock cycle; T
H
 = Internal clock high; 
T
L
 = Internal clock low
Figure 2-1.    
Crystal Oscillator Circuits
Table 2-5.     
External Clock Operation
No.
Characteristics
Symbol
200 MHz
220 MHz
240 MHz
275 MHz
Min
Max
Min
Max
Min
Max
Min
Max
1
Frequency of EXTAL 
(EXTAL Pin Frequency)
1
With DPLL disabled
With DPLL enabled
2
Ef
DEFR = PDF 
×
 PDFR
0 MHz
16 MHz
200 MHz
200 MHz
0 MHz
16 MHz
220 MHz
220 MHz
0 MHz
16 MHz
240 MHz
240 MHz
0 MHz
16 MHz
275 MHz
275 MHz
2
EXTAL input high
3
With DPLL disabled 
(46.7%–53.3% duty 
cycle
4
) 
With DPLL enabled 
(42.5%–57.5% duty 
cycle
4
) 
ET
H 
2.34 ns
2.13 ns
∞
35.9 ns
2.12 ns
1.93 ns
∞
35.9 ns
1.95 ns
1.77 ns
∞
35.9 ns
1.70 ns
1.55 ns
∞
35.9 ns
3
EXTAL input low
4
With DPLL disabled 
(46.7%–53.3% duty 
cycle
4
)
With DPLL enabled 
(42.5%–57.5% duty 
cycle
4
) 
ET
L 
2.34 ns
2.13 ns
∞
35.9 ns
2.12ns
1.93 ns
∞
35.9 ns
1.95 ns
1.77 ns
∞
35.9 ns
1.70 ns
1.55 ns
∞
35.9 ns
Table 2-4.     
Internal Clocks  (Continued)
Characteristics
Symbol
Expression
Min
Typ
Max
Suggested Component Values:
f
OSC
 = 16–32 MHz
R = 1 M
±
 10%
C = 10 pF 
±
 10%
Calculations are for a 16–32 MHz crystal with the following parameters: 
shunt capacitance (C
0
) of 5.2–7.3 pF, 
series resistance of 5–15
 
, and
drive level of 2 mW.
XTAL1
C
C
R 
Fundamental Frequency
Crystal Oscillator
XTAL
EXTAL
Note:
 Make sure that in the PCTL Register:
XTLD (bit 2) = 0