參數(shù)資料
型號(hào)： DSP1620
英文描述： TVS 400W 6.0V BIDIRECT SMA
中文描述： 澄清，串行I /設(shè)備的DSP1620/27/28/29 O控制注冊(cè)說明
文件頁數(shù)： 83/114頁
文件大小： 804K
代理商： DSP1620
Preliminary Data Sheet
February 1997
DSP1628 Digital Signal Processor
81
Lucent Technologies Inc.
9 Electrical Characteristics and Requirements
The following electrical characteristics are preliminary and are subject to change. Electrical characteristics refer to
the behavior of the device under specified conditions. Electrical requirements refer to conditions imposed on the
user for proper operation of the device. The parameters below are valid for the conditions described in Section 8.3,
Recommended Operating Conditions.
Note 1.The small-signal buffer must be used in single-ended mode where an ac waveform (sine or square) is applied to CKI and a dc voltage
approximately equal to the average value of CKI is applied to CKI2, as shown in the figure below. The maximum allowable ripple on CKI2
is 100 mV.
Note 2.Duty cycle for a sine wave is defined as the percentage of time during each clock cycle that the voltage on CKI exceeds the voltage on
CKI2.
Table 61. Electrical Characteristics and Requirements
Parameter
Symbol
Min
Max
Unit
Input Voltage:
Low
High
Input Current (except TMS, TDI):
Low (V
IL
= 0 V, V
DD
= 5.25 V)
High (V
IH
= 5.25 V, V
DD
= 5.25 V)
Input Current (TMS, TDI):
Low (V
IL
= 0 V, V
DD
= 5.25 V)
High (V
IH
= 5.25 V, V
DD
= 5.25 V)
Output Low Voltage:
Low (I
OL
= 2.0 mA)
Low (I
OL
= 50
μ
A)
Output High Voltage:
High (I
OH
= –2.0 mA)
High (I
OH
= –50
μ
A)
Output 3-State Current:
Low (V
DD
= 5.25 V, V
IL
= 0 V)
High (V
DD
= 5.25 V, V
IH
= 5.25 V)
Input Capacitance
V
IL
V
IH
–0.3
0.3 * V
DD
V
DD
+ 0.3
V
V
0.7 * V
DD
I
IL
I
IH
–5
—
—
5
μ
A
μ
A
I
IL
I
IH
–100
—
—
5
μ
A
μ
A
V
OL
V
OL
—
—
0.4
0.2
V
V
V
OH
V
OH
V
DD
– 0.7
V
DD
– 0.2
—
—
V
V
I
OZL
I
OZH
C
I
–10
—
—
—
10
5
μ
A
μ
A
pF
Table 62. Electrical Requirements for Mask-Programmable Input Clock Options
Parameter
Symbol
Min
Max
Unit
Note
CKI CMOS Level Input Voltage:
Low
High
Small-Signal Peak-to-Peak Voltage
(on CKI)
Small-Signal Input Duty Cycle
Small-Signal Input Voltage Range
(pins: CKI, CKI2)
Small-Signal Buffer Frequency Range
VIL
VIH
Vpp
–0.3
0.3 * V
DD
V
DD
+ 0.3
—
V
V
V
—
—
0.7 * V
DD
0.6
Note 1
DCyc
Vin
45
55
%
V
Note 2
—
0.2 * V
DD
0.6 * V
DD
fss
—
35
MHz
—
CKI
CKI2
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