
Preliminary Data Sheet
February 1997
DSP1628 Digital Signal Processor
62
Lucent Technologies Inc.
5 Software Architecture
(continued)
If the EXM pin is high and the INT1 is low upon reset, the
mwait
register is initialized to all 1s (15 wait-states for all
external memory). Otherwise, the
mwait
register is initialized to all 0s (0 wait-states) upon reset.
* The ebusy flag cannot be written by the user.
Table 39. alf Register
Bit
Field
15
14
13—0
FLAGS
AWAIT
LOWPR
Field
AWAIT
Value
1
Action
0
1
Power-saving standby mode or standard sleep enabled.
Normal operation.
The internal DPRAM is addressed beginning at 0x0000 in X space.
LOWPR
0
—
The internal DPRAM is addressed beginning at 0xc000 in X space.
See table below.
FLAGS
Bit
Flag
Use
—
13—9
8
7
6
5
4
3
2
1
0
Reserved
ebusy*
nmns1
mns1
evenp
oddp
somef
somet
allf
allt
ECCP BUSY
NOT-MINUS-ONE from BMU
MINUS-ONE from BMU
EVEN PARITY from BMU
ODD PARITY from BMU
SOME FALSE from BIO
SOME TRUE from BIO
ALL FALSE from BIO
ALL TRUE from BIO
Table 40. mwait Register
Bit
Field
15—12
EROM[3:0]
11—8
7—4
IO[3:0]
3—0
ERAMHI[3:0]
ERAMLO[3:0]
Table 41. DSP1628 32-Bit JTAG ID Register
Bit
Field
31
30
29—28
CLOCK
27—19
ROMCODE
18—12
PART ID
11—0
0x03B
RESERVED
SECURE
Field
Value
0
0
1
01
11
—
Mask-Programmable Features
—
RESERVED
SECURE
Nonsecure ROM option.
Secure ROM option.
Small-signal input clock option.
CMOS level input clock option.
Users ROMCODE ID:
The ROMCODE ID is the 9-bit binary value of the following expression:
(20 x value for first letter) + (value of second letter), where the values of the letters
are in the following table. For example, ROMCODE GK is (20 x 6) + (9) = 129
or 0 1000 0001.
DSP1628
CLOCK
ROMCODE
PART ID
0x2A
ROMCODE Letter
Value
A
0
B
1
C
2
D
3
E
4
F
5
G
6
H
7
J
8
K
9
L
10
M
11
N
12
P
13
R
14
S
15
T
16
U
17
W
18
Y
19