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參數(shù)資料
| 型號： | CYNSE70064A-83BGC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 通信及網(wǎng)絡 |
| 英文描述： | Search Engine |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PBGA272 |
| 封裝： | 27 X 27 MM, 2.33 MM HEIGHT, PLASTIC, BGA-272 |
| 文件頁數(shù)： | 54/127頁 |
| 文件大?。?/td> | 3275K |
| 代理商： | CYNSE70064A-83BGC |
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CYNSE70064A
Document #: 38-02041 Rev. *E
Page 54 of 127
The logical 136-bit Search operation is shown in
Figure 10-34
. The entire table (eight devices of 136-bit entries) is compared to
a 136-bit word K (presented on the DQ bus in cycles A and B of the command) using the GMR and local mask bits. The GMR is
the 136-bit word specified by the even and odd global mask pair selected by the GMR Index in the command’s cycle A.
The 136-bit word K (presented on the DQ bus in cycles A and B of the command) is also stored in the even and odd comparand
registers specified by the Comparand Register Index in the command’s cycle B. In ×136 configurations, the even and odd
comparand registers can subsequently be used by the Learn command in only one of the devices (the first non-full device). The
word K (presented on the DQ bus in cycles A and B of the command) is compared to each entry in the table starting at location
0. The first matching entry’s location, address L, is the winning address that is driven as part of the SRAM address on the
SADR[21:0] lines (see “SRAM Addressing” on page 100). The global winning device will drive the bus in a specific cycle. On
global miss cycles the device with LRAM = 1 (the default driving device for the SRAM bus) and LDEV = 1 (the default driving
device for SSF and SSV signals) will be the default driver for such missed cycles.
Note
. During 136-bit searches of
136-bit-configured tables, the Search hit will always be at an even address.
The Search command is a pipelined operation and executes a Search at half the rate of the frequency of CLK2X for 136-bit
searches in ×136-configured tables. The latency of SADR, CE_L, ALE_L, WE_L, SSV, and SSF from the 136-bit Search
command cycle (two CLK2X cycles) is shown in
Table 10-21
.
Table 10-21. Search Latency from Instruction to SRAM Access Cycle
Number of Devices
Max Table Size
1 (TLSZ = 00)
16K × 136 bits
1–8 (TLSZ = 01)
128K × 136 bits
1–31 (TLSZ = 10)
496K × 136 bits
For one to eight devices in the table and TLSZ = 01, the latency of a Search from command to SRAM access cycle is 5. In addition,
SSV and SSF shift further to the right for different values of HLAT as specified in
Table 10-22
.
Table 10-22. Shift of SSF and SSV from SADR
HLAT
000
001
010
011
100
101
110
111
Latency in CLK Cycles
4
5
6
Number of CLK Cycles
0
1
2
3
4
5
6
7
CFG = 01010101
(136-bit configuration)
135
0
Location
address
0
2
4
6
262142
K
GMR
Comparand Register (odd)
B
Comparand Register (even)
A
135
0
67
0
(First matching entry)
L
A
B
Even
Odd
Will be same in each of the eight
devices
Must be same in each of the eight
devices
Figure 10-34. ×136 Table with Eight Devices
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