參數(shù)資料
型號(hào)： CYP15G0402DX-BGC
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Quad HOTLinkII SERDES
中文描述： SPECIALTY TELECOM CIRCUIT, PBGA256
封裝： 27 X 27 MM, 1.52 MM HEIGHT, THERMALLY ENHANCED, BGA-256
文件頁(yè)數(shù)： 1/27頁(yè)
文件大?。?/td> 852K
代理商： CYP15G0402DX-BGC
Cypress Semiconductor Corporation
Document #: 38-02023 Rev. *B
3901 North First Street
San Jose
CA 95134
Revised February 14, 2002
408-943-2600
CYP15G0402DX
PRELIMINARY
Quad HOTLinkII
SERDES
Features
Second generation HOTLink
technology
Fibre-Channel and Gigabit-Ethernet-compliant
10-bit unencoded data transport
—
Aggregate throughput of 12 GB/s
Selectable parity check/generate
Four independently controlled 10-bit channels
Selectable input clocking options
User selectable framing character
—
+Comma, ±comma, or full K28.5 detect
—
Single or multicharacter framer for character align-
ment
—
Low-latency option
Synchronous parallel input interface
—
User-configurable threshold level
—
Compatible with LVTTL, LVCMOS, LVTTL
Synchronous parallel output interface
—
Compatible with LVTTL, LVCMOS, LVTTL
200-to-1500 MBaud serial signaling rate
Internal PLLs with no external PLL components
—
Separate clock and data-recovery PLL per channel
—
Common transmit clock multiplier PLL
Differential PECL-compatible serial inputs
Differential PECL-compatible serial outputs
—
Source matched for 50
transmission lines
—
No external resistors required
—
Adjustable amplitude for 100
or 150
balanced
loads
Compatible with fiber-optic modules and copper cables
JTAG boundary scan
Built-in self-test (BIST) for at-speed link testing
Per-channel Link Quality Indicator
—
Analog signal detect
—
Digital signal detect
Low-power 3W typical
256-ball BGA
0.25
μ
BiCMOS technology
Functional Description
The CYP15G0402DX Quad HOTLinkII
SERDES is a
point-to-point communications building block allowing the
transfer of pre-encoded data over high-speed serial links
(optical fiber, balanced, and unbalanced copper transmission
lines) at speeds ranging from 200 to 1500 MBaud per serial
link.
Each transmit channel accepts pre-encoded 10-bit trans-
mission characters in an input register, serializes each
character, and drives it out a PECL-compatible differential line
driver. Each receive channel accepts a serial data stream at a
differential line receiver, deserializes the stream into 10-bit
characters, frames these characters to the proper 10-bit
character boundaries, and this data becomes register outputs
with a recovered character clock.
Figure 1
illustrates typical
connections
between
independent
CYP15G0402DX.
As
a
second-generation
CYP15G0402DX extends the HOTLink family to faster data
rates, while maintaining serial link compatibility with other
HOTLink devices.
systems
and
a
HOTLink
device,
the
Figure 1. CYP15G0402DX HOTLink II
System Connections
Serial Links
Independent
Channel
Transceiver
10
10
10
10
10
10
10
10
S
C
10
10
10
10
10
10
10
10
Serial Links
Serial Links
Serial Links
Cable or
Optical
Connections
Independent
Channel
Transceiver
Independent
Channel
Transceiver
Independent
Channel
Transceiver
S
相關(guān)PDF資料
PDF描述
CYP15G0402DX Quad HOTLinkII SERDES
CYP15G0402DX-BGI Quad HOTLinkII SERDES
CYP15G0402DXB Quad HOTLink II SERDES(四HOTLink II并行轉(zhuǎn)換器)
CYV15G0402DXB Quad HOTLink II SERDES(四HOTLink II并行轉(zhuǎn)換器)
CYP15G0403DXB Independent Clock Quad HOTLink II Transceiver(獨(dú)立時(shí)鐘，四熱連接II收發(fā)器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CYP15G0402DX-BGI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Quad HOTLinkII SERDES
CYP15G0402DX-EVAL 功能描述:界面開發(fā)工具 Quad Ch HOTLink II GbE 1XFC SERDES RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評(píng)估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
CYP15G0403DXB 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Independent Clock Quad HOTLink II Transceiver Single 3.3V supply
CYP15G0403DXB_07 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Independent Clock Quad HOTLink II⑩ Transceiver
CYP15G0403DXB_09 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Independent Clock Quad HOTLink II Transceiver
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