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參數(shù)資料
| 型號： | CYV15G0402DXB |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Quad HOTLink II SERDES(四HOTLink II并行轉(zhuǎn)換器) |
| 中文描述： | 二，四的HOTLink SERDES的（四的HOTLink二并行轉(zhuǎn)換器） |
| 文件頁數(shù)： | 1/29頁 |
| 文件大?。?/td> | 634K |
| 代理商： | CYV15G0402DXB |
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Quad HOTLink II SERDES
CYP15G0402DXB
CYV15G0402DXB
Cypress Semiconductor Corporation
Document #: 38-02057 Rev. *G
3901 North First Street
San Jose
,
CA 95134
408-943-2600
Revised March 31, 2005
Features
Second-generation HOTLink
technology
Compliant to multiple standards
—Fibre Channel, Gigabit Ethernet (IEEE802.3z), ES-
CON
and DVB-ASI
—CYV15G0402DXB compliant to SMPTE 259M and
SMPTE 292M
Quad-channel transceiver operates from 195 to 1500
Mbps serial data rate
—Aggregate throughput of 12 Gbps
10-bit unencoded data transport
Selectable parity check/generate
Four independent 10-bit channels with separate Clock
and Data Recovery for each channel
Selectable input clocking options
MultiFrame Receive Framer
—Comma or full K28.5 detect
—Single or Multi-Byte framer for byte alignment
—Low-latency option
Synchronous LVTTL parallel interface
Internal phase-locked loops (PLLs) with no external
PLL components
Optional Phase Align Buffer in Transmit Path
Differential PECL-compatible serial inputs
Differential PECL-compatible serial outputs
—
Source matched for 50
transmission lines
—No external resistors required
—Signaling rate controlled edge rates
Compatible with
—Fiber-optic modules
—Copper cables
—Circuit board traces
JTAG boundary scan
Built-In Self-Test (BIST) for at-speed link testing
Per-channel Link Quality Indicator
—Analog signal detect
—Digital signal detect
Low-power 2.5W @3.3V typical
Single 3.3V supply
256-ball thermally enhanced BGA
Pb-Free package option available
0.25
μ
BiCMOS technology
Functional Description
The CYP(V)15G0402DXB
[1]
Quad HOTLink II SERDES is a
point-to-point communications building block allowing the
transfer of preencoded data over high-speed serial links
(optical fiber, balanced, and unbalanced copper transmission
lines) at signaling speeds ranging from 195 to 1500 MBaud per
serial link.
Each transmit channel accepts preencoded 10-bit trans-
mission characters in an Input Register, serializes each
character, and drives it out a PECL-compatible differential line
driver. Each receive channel accepts a serial data stream at a
differential line receiver, deserializes the stream into 10-bit
characters, optionally frames these characters to the proper
10-bit character boundaries and presents these characters to
an Output register.
Figure 1
illustrates typical connections
between independent systems and a CYP(V)15G0402DXB.
The CYV15G0402DXB satisfies the SMPTE-259M and
SMPTE-292M compliance as per the EG34-1999 Pathological
Test Requirements.
Note:
1.
CYV15G0402DXB refers to SMPTE 259M and SMPTE 292M compliant devices. CYP15G0402DXB refers to devices that are not compliant to SMPTE 259M
and SMPTE 292M pathological test requirements. CYP(V)15G0402DXB refers to both devices.
Figure 1. CYP(V)15G0402DXB HOTLink II System Connections
Serial Links
Independent
Channel
Transceiver
10
10
10
10
10
10
10
10
S
10
10
10
10
10
10
10
10
Serial Links
Serial Links
Serial Links
Cable or
Optical
Connections
Independent
Channel
Transceiver
Independent
Channel
Transceiver
Independent
Channel
Transceiver
S
C
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CYV15G0402DXB-BGC | 功能描述:電信線路管理 IC Quad Port Video COM RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| CYV15G0402DXB-BGI | 制造商:Cypress Semiconductor 功能描述: |
| CYV15G0402DXB-BGXC | 功能描述:電信線路管理 IC Quad Port Video HOTLink II Video RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| CYV15G0402DXB-BGXI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Quad HOTLink II⑩ SERDES |
| CYV15G0403DXB | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Independent Clock Quad HOTLink II⑩ Transceiver |
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