參數(shù)資料
型號(hào)： ARM610
廠商： Zarlink Semiconductor Inc.
英文描述： General purpose 32-bit microprocessor
中文描述： 通用32位微處理器
文件頁數(shù)： 75/173頁
文件大小： 897K
代理商： ARM610
Instruction Set - CDP
ARM610 Data Sheet
4-47
O
4.12 Coprocessor Data Operations (CDP)
The instruction is only executed if the condition is true. The various conditions are
defined in
·
Table 4-2: Condition code summaryon page 4-6. The instruction encoding
is shown in
·
Figure 4-23: Coprocessor data operation instruction
This class of instruction is used to tell a coprocessor to perform some internal
operation. No result is communicated back to ARM610, and it will not wait for the
operation to complete. The coprocessor could contain a queue of such instructions
awaiting execution, and their execution can overlap other activity, allowing the
coprocessor and ARM610 to perform independent tasks in parallel.
Figure 4-23: Coprocessor data operation instruction
4.12.1 The coprocessor fields
Only bit 4 and bits 24 to 31 are significant to ARM610. The remaining bits are used by
coprocessors. The above field names are used by convention, and particular
coprocessors may redefine the use of all fields except CP# as appropriate. The CP#
field is used to contain an identifying number (in the range 0 to 15) for each
coprocessor, and a coprocessor will ignore any instruction which does not contain its
number in the CP# field.
The conventional interpretation of the instruction is that the coprocessor should
perform an operation specified in the CP Opc field (and possibly in the CP field) on the
contents of CRn and CRm, and place the result in CRd.
4.12.2 Instruction cycle times
Coprocessor data operations take 1S + bI incremental cycles to execute, where bis
the number of cycles spent in the coprocessor busy-wait loop.
S and I are as defined in
·
6.2 Cycle Typeson page 6-2.
31
28 27
24
23
20 19
16 15
12 11
8
7
5
4
3
0
Cond
1110
CP Opc
CRn
CRd
CP#
CP
0
CRm
Coprocessor operand register
Coprocessor information
Coprocessor number
Coprocessor destination register
Coprocessor operand register
Coprocessor operation code
Condition field
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