參數(shù)資料
型號(hào)： ARM610
廠商： Zarlink Semiconductor Inc.
英文描述： General purpose 32-bit microprocessor
中文描述： 通用32位微處理器
文件頁數(shù)： 44/173頁
文件大?。?/td> 897K
代理商： ARM610
Instruction Set - TEQ, TST, CMP, CMN
ARM610 Data Sheet
4-16
O
where:
<Op2>
is Rm{,<shift>} or,<#expression>
{cond}
is a two-character condition mnemonic. See
·
Table 4-2:
Condition code summaryon page 4-6.
{S}
set condition codes if S present (implied for CMP, CMN, TEQ,
TST).
Rd, Rn and Rm
are expressions evaluating to a register number.
<#expression>
if this is used, the assembler will attempt to generate a shifted
immediate 8-bit field to match the expression. If this is
impossible, it will give an error.
<shift>
is <shiftname> <register> or <shiftname> #expression, or
RRX (rotate right one bit with extend).
<shiftname>s
are: ASL, LSL, LSR, ASR, ROR. (ASL is a synonym for LSL,
they assemble to the same code.)
4.4.8 Examples
ADDEQ R2,R4,R5
TEQS
R4,#3
; If the Z flag is set make R2:=R4+R5
; test R4 for equality with 3.
; (The S is in fact redundant as the
; assembler inserts it automatically.)
R4,R5,R7,LSR R2; Logical right shift R7 by the number in
; the bottom byte of R2, subtract result
; from R5, and put the answer into R4.
PC,R14
; Return from subroutine.
PC,R14
; Return from exception and restore CPSR
; from SPSR_mode.
SUB
MOV
MOVS
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