參數(shù)資料
型號： ARM610
廠商： Zarlink Semiconductor Inc.
英文描述： General purpose 32-bit microprocessor
中文描述： 通用32位微處理器
文件頁數(shù)： 73/173頁
文件大?。?/td> 897K
代理商： ARM610
Instruction Set - SWI
ARM610 Data Sheet
4-45
O
4.11 Software Interrupt (SWI)
The instruction is only executed if the condition is true. The various conditions are
defined in
·
Table 4-2: Condition code summaryon page 4-6. The instruction encoding
is shown in
·
Figure 4-22: Software interrupt instruction below.
Figure 4-22: Software interrupt instruction
The software interrupt instruction is used to enter Supervisor mode in a controlled
manner. The instruction causes the software interrupt trap to be taken, which effects
the mode change. The PC is then forced to a fixed value (0x08) and the CPSR is saved
in SPSR_svc. If the SWI vector address is suitably protected (by external memory
management hardware) from modification by the user, a fully protected operating
system may be constructed.
4.11.1 Return from the supervisor
The PC is saved in R14_svc upon entering the software interrupt trap, with the PC
adjusted to point to the word after the SWI instruction. MOVS PC,R14_svc will return
to the calling program and restore the CPSR.
Note that the link mechanism is not re-entrant, so if the supervisor code wishes to use
software interrupts within itself it must first save a copy of the return address and
SPSR.
4.11.2 Comment field
The bottom 24 bits of the instruction are ignored by the processor, and may be used
to communicate information to the supervisor code. For instance, the supervisor may
look at this field and use it to index into an array of entry points for routines which
perform the various supervisor functions.
4.11.3 Instruction cycle times
Software interrupt instructions take 2S + 1N incremental cycles to execute, where S
and N are as defined in
·
6.2 Cycle Typeson page 6-2.
31
28 27
24
23
0
Cond
1111
Comment field (ignored by Processor)
Condition field
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