參數(shù)資料
型號： ARM610
廠商： Zarlink Semiconductor Inc.
英文描述： General purpose 32-bit microprocessor
中文描述： 通用32位微處理器
文件頁數(shù)： 52/173頁
文件大?。?/td> 897K
代理商： ARM610
Instruction Set - LDR, STR
ARM610 Data Sheet
4-24
O
4.7
Single Data Transfer (LDR, STR)
The instruction is only executed if the condition is true. The various conditions are
defined in
·
Table 4-2: Condition code summaryon page 4-6. The instruction encoding
is shown in
·
Figure 4-12: Single data transfer instructionson page 4-24.
The single data transfer instructions are used to load or store single bytes or words of
data. The memory address used in the transfer is calculated by adding an offset to or
subtracting an offset from a base register.
The result of this calculation may be written back into the base register if auto-indexing
is required.
Figure 4-12: Single data transfer instructions
26
25
24
23
22
21
0
01
I
P
U
B
W
L
Rn
Rd
11
0
IImmediate offset
11 = Offset is a register
Shift
Rm
11
4
3
0
SShift
Rm
Rm
sshift applied to Rm
Condition field
31
288 27
26
25
24
23
22
21
220 19
116 15
112 11
0
Cond
01
I
P
U
B
W
L
Rn
Rd
Offset
Source/Destination register
Base register
Load/Store bit
00 = Store to memory
11 = Load from memory
Write-back bit
00 = No write-back
11 = Write address into space
Byte/Word bit
00 = Transfer word quantity
11 = Transfer byte quantity
Up/Down bit
00 = Down; subtract offset from base
11 = Up; add offset from base
Pre/Post indexing bit
00 = Post; add offset after transfer
11 = Pre; add offset before transfer
IImmediate offset
00 = Offset is an immediate value
11
0
Unsigned 12-bit immediate offset
11
4
3
0
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