參數(shù)資料
型號(hào)： ARM610
廠商： Zarlink Semiconductor Inc.
英文描述： General purpose 32-bit microprocessor
中文描述： 通用32位微處理器
文件頁數(shù)： 33/173頁
文件大小： 897K
代理商： ARM610
Instruction Set - Condition Field
ARM610 Data Sheet
4-5
O
4.2
The Condition Field
In ARM state, all instructions are conditionally executed according to the state of the
CPSR condition codes and the instruction’s condition field. This field (bits 31:28)
determines the circumstances under which an instruction is to be executed.
If the state of the C, N, Z and V flags fulfils the conditions encoded by the field, the
instruction is executed, otherwise it is ignored.
There are 16 possible conditions, each represented by a two-character suffix that can
be appended to the instruction’s mnemonic. For example, a Branch (
language) becomes
BEQ
for "Branch if Equal", which means the Branch will only be
taken if the Z flag is set.
B
in assembly
In practice, 15 different conditions may be used: these are listed in
Condition code summary
. The sixteenth (1111) is reserved, and must not be used.
·
Table 4-2:
In the absence of a suffix, the condition field of most instructions is set to "Always"
(suffix AL). This means the instruction will always be executed regardless of the CPSR
condition codes.
31
28 27
0
Cond
Condition field
0000 = EQ- Z set (equal)
0001 = NE - Z clear (not equal)
0010 = CS - C set (unsigned higher or same)
0011 = CC- C clear (unsigned lower)
0100 = MI - N set (negative)
0101 = PL - N clear (positive or zero)
0110 = VS - V set (overflow)
0111 = VC - V clear (no overflow)
1000 = HI - C set and Z clear (unsigned higher)
1001 = LS - C clear or Z set (unsigned lower or same)
1010 = GE- N set and V set, or N clear and V clear (greater or equal)
1011 = LT - N set and V clear, or N clear and V set (less than)
1100 = GT - Z clear, and either N set and V set, or N clear and V clear (greater than)
1101 = LE - Z set, or N set and V clear, or N clear and V set (less than or equal)
1110 = AL - always
1111 = NV - never
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