參數(shù)資料
型號： ARM610
廠商： Zarlink Semiconductor Inc.
英文描述： General purpose 32-bit microprocessor
中文描述： 通用32位微處理器
文件頁數(shù)： 118/173頁
文件大?。?/td> 897K
代理商： ARM610
Memory Management Unit
ARM610 Data Sheet
9-14
9.14 Domain Access Control
MMU accesses are primarily controlled via domains. There are 16 domains, and each
has a 2-bit field to define it. Two basic kinds of users are supported: Clients and
Managers. Clients use a domain; Managers control the behaviour of the domain. The
domains are defined in the Domain Access Control Register.
·
Figure 9-9: Domain
access control register formatillustrates how the 32 bits of the register are allocated
to define the sixteen 2-bit domains.
Figure 9-9: Domain access control register format
·
Table 9-5: Interpreting access bits in domain access control registerdefines how the
bits within each domain are interpreted to specify the access permissions.
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Value
Meaning
Notes
00
No Access
Any access will generate a Domain Fault.
01
Client
Accesses are checked against the access permission bits in
the Section or Page descriptor.
10
Reserved
Reserved. Currently behaves like the no access mode.
11
Manager
Accesses are notchecked against the access Permission bits
so a Permission fault cannot be generated.
Table 9-5: Interpreting access bits in domain access control register
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