參數(shù)資料
型號: AK8850
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: NTSC Digital Video Decoder
中文描述: NTSC制式數(shù)字視頻解碼器
文件頁數(shù): 36/99頁
文件大?。?/td> 1757K
代理商: AK8850
ASAHI KASEI
[AK8850]
* [ CLKMODE1 : CLKMODE0 ]-bit set
[CLKMODE1: CLKMODE0 ]
00
Fixed clock
External Clock mode
01
Line-Locked Clock
Line Lock Clock mode
According to the input video signal quality, AK8850 works in
Fixed clock mode.
10
Frame-Locked Clock
Frame Lock Clock mode
According to the input video signal quality, AK8850 works in
Fixed clock mode.
11
Auto Clock Mode
According to the Input video signal quality, Clock mode is
switched to the most suitable clock mode.(default)
The VCXO’s oscillating center frequency control voltage is adjusted by setting the DAC output current value [ PLL DAC
SET REGISTER ]. In Fixed Clock mode operation, the VCXO oscillating frequency is fixed by the value set here.
* [ PLL DAC SET REGISTER ]
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
PLLDACI7
PLLDACI6
PLLDACI5
PLLDACI4
PLLDACI3
PLLDACI2
PLLDACI1
Reserved
1
0
The DAC’s upper 7 bits are valid. Adjustable DAC current value ranges are as follows.
PLLDAC[7:1]
[uA] Typ.)
0000000
0
1111111
127
( 7-2-5 ) LOOP FILTER
The AK8850 requires external loop filters. Proper loop filters should be connected for the Line-Locked and the
Frame-Locked PLLs respectively. The optimum value of the loop filter constant varies with the VCXO gain [ ppm / V ]
characteristics.
LLPF (For Line Lock)
FLPF (For Frame Lock
R1
C1
C2
LLPFC ( For Line Lock)
FLPFC ( For Frame Lock)
An example of the loop filter constant for a 100 ppm/V VCXO is shown ( IVCXO output load resistor at 10 Kohm ).This loop
filter constant ( reference value ) is set by the [ PLL CONTROL REGISTER ] ( Sub address 0x46 ) [ LPGAUTO ]-bit
[LPGAUTO] - bit = 0 (Default)
[LPGAUTO]-bit = 1
R
C1
C2
R
C1
C2
Line Lock
9.1k
6.8uF
0.68uF
18k
3.4uF
0.34uF
Frame Lock
5.6M
0.18uF
0.018uF
3.3M
0.3uF
0.03uF
Rev.0
41
2002/01
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