- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄24828 > 935268625551 (NXP SEMICONDUCTORS) UNIVERSAL SERIAL BUS CONTROLLER, PQFP64 PDF資料下載
參數(shù)資料
| 型號(hào)： | 935268625551 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64 |
| 文件頁(yè)數(shù)： | 62/82頁(yè) |
| 文件大?。?/td> | 1965K |
| 代理商： | 935268625551 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)當(dāng)前第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)
Philips Semiconductors
ISP1581
Hi-Speed USB interface device
Product data
Rev. 05 — 26 February 2003
65 of 78
9397 750 10766
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
14.3.3
MDMA mode
Table 79:
GDMA slave mode timing parameters
VCC = 4.0 to 5.5 V; VGND =0V; Tamb = 40 to +85 °C.
Symbol
Parameter
Min
Max
Unit
Tcy1
read/write cycle time
78
-
ns
tsu1
DREQ set-up time before rst DACK on
10
-
ns
td1
DREQ on delay after last strobe off
33.33
-
ns
th1
DREQ hold time after last strobe on
0
53
ns
tw1
DIOR/DIOW pulse width
39
600
ns
tw2
DIOR/DIOW recovery time
36
-
ns
td2
read data valid delay after strobe on
-
20
ns
th2
read data hold time after strobe off
-
5
ns
th3
write data hold time after strobe off
1
-
ns
tsu2
write data set-up time before strobe off
10
-
ns
tsu3
DACK setup time before DIOR/DIOW
assertion
0-
ns
ta1
DACK de-assertion after DIOR/DIOW
de-assertion
030
ns
(1) Programmable polarity: shown as active LOW.
(2) Programmable polarity: shown as active HIGH.
Fig 27. MDMA master mode timing.
(write) DATA[15:0]
(read) DATA[15:0]
DREQ (2)
DACK(1)
DIOR/DIOW(1)
tw1
tw2
tsu1
tsu2
td2
tsu2
th1
th2
th3
Tcy1
MGT506
td1
td3
Table 80:
MDMA mode timing parameters
VCC = 4.0 to 5.5 V; VGND =0V; Tamb = 40 to +85 °C.
Symbol
Parameter
Mode 0
Mode 1
Mode 2
Unit
Tcy1(min)
read/write cycle time (minimum)[1]
480
150
120
ns
tw1(min)
DIOR/DIOW pulse width (minimum)[1]
215
80
70
ns
td1(max)
data valid delay after DIOR on
(maximum)
150
60
50
ns
th3(min)
data hold time after DIOR off (minimum)
555ns
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 080207R0 | TELEFON-AKKU |
| 080216R0 | TELEFON-AKKU |
| 080219R0 | TELEFON-AKKU |
| 080251R0 | TELEFON-AKKU |
| 935268664112 | 133 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 935268721125 | 制造商:NXP Semiconductors 功能描述:Buffer/Line Driver 1-CH Non-Inverting 3-ST CMOS 5-Pin TSSOP T/R |
| 935269304128 | 制造商:ST-Ericsson 功能描述:IC AUDIO CODEC W/TCH SCRN 48LQFP |
| 935269544557 | 制造商:NXP Semiconductors 功能描述:SUB ONLY TDA9587-2US1-V1.3 |
| 935269987557 | 制造商:NXP Semiconductors 功能描述:SUB ONLY TDA9587-1US1-V1.8 SUBBED TO 935269987557 |
| 935270713557 | 制造商:NXP Semiconductors 功能描述:SUB ONLY IC CHP |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。