參數(shù)資料
型號: 935268625551
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
文件頁數(shù): 26/82頁
文件大小: 1965K
代理商: 935268625551
Philips Semiconductors
ISP1581
Hi-Speed USB interface device
Product data
Rev. 05 — 26 February 2003
32 of 78
9397 750 10766
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9.4.3
DMA Conguration register (address: 38H)
This register denes the DMA conguration for the Generic DMA (GDMA) and the
Ultra-DMA (UDMA) modes. The DMA Conguration register consists of 2 bytes. The
bit allocation is given in Table 33.
Bit
15
14
13
12
11
10
9
8
Symbol
DMACR2 = DMACR[15:8]
Reset
00H
Bus reset
00H
Access
R/W
Bit
7
6
5
4
3
2
1
0
Symbol
DMACR1 = DMACR[7:0]
Reset
00H
Bus reset
00H
Access
R/W
Table 32:
DMA Transfer Counter register: bit description
Bit
Symbol
Description
31 to 24
DMACR4,
DMACR[31:24]
DMA transfer counter byte 4 (MSB)
23 to 16
DMACR3,
DMACR[23:16]
DMA transfer counter byte 3
15 to 8
DMACR2,
DMACR[15:8]
DMA transfer counter byte 2
7 to 0
DMACR1,
DMACR[7:0]
DMA transfer counter byte 1 (LSB)
Table 33:
DMA Conguration register: bit allocation
Bit
15
14
13
12
11
10
9
8
Symbol
reserved
IGNORE_
IORDY
ATA_
MODE
DMA_MODE[1:0]
PIO_MODE[2:0]
Reset
-
0
00H
Bus Reset
-
0
00H
Access
R/W
Bit
7
6
5
4
3
2
1
0
Symbol
DIS_
XFER_
CNT
BURST[2:0]
MODE[1:0]
reserved
WIDTH
Reset
0
00H
-
1
Bus Reset
0
00H
-
1
Access
R/W
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