Operating Modes and On-Chip Memory
Memory Map
MC68HC11E Family
—
Rev. 4
Technical Data
MOTOROLA
Operating Modes and On-Chip Memory
75
$1015
Timer Input Capture 3 Register
Low (TIC3L)
See page 185.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
Indetermnate after reset
$1016
Timer Output Compare 1
Register High (TOC1H)
See page 188.
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
1
1
1
1
1
1
1
1
$1017
Timer Output Compare 1
Register Low (TOC1L)
See page 188.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
1
1
1
1
1
1
1
1
$1018
Timer Output Compare 2
Register High (TOC2H)
See page 188.
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
1
1
1
1
1
1
1
1
$1019
Timer Output Compare 2
Register Low (TOC2L)
See page 188.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
1
1
1
1
1
1
1
1
$101A
Timer Output Compare 3
Register High (TOC3H)
See page 189.
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
1
1
1
1
1
1
1
1
$101B
Timer Output Compare 3
Register Low (TOC3L)
See page 189.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
1
1
1
1
1
1
1
1
$101C
Timer Output Compare 4
Register High (TOC4H)
See page 189.
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
1
1
1
1
1
1
1
1
$101D
Timer Output Compare 4
Register Low (TOC4L)
See page 189.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
1
1
1
1
1
1
1
1
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
= Unimplemented
R
= Reserved
U = Unaffected
I = Indetermnate after reset
Figure 4-7. Register and Control Bit Assignments (Sheet 4 of 8)