Technical Data
MC68HC11E Family
—
Rev. 4
218
Analog-to-Digital (A/D) Converter
MOTOROLA
Analog-to-Digital (A/D) Converter
10.10 A/D Control/Status Register
All bits in this register can be read or written, except bit 7, which is a
read-only status indicator, and bit 6, which always reads as 0. Write to
ADCTL to initiate a conversion. To quit a conversion in progress, write to
this register and a new conversion sequence begins immediately.
CCF
—
Conversion Complete Flag
A read-only status indicator, this bit is set when all four A/D result
registers contain valid conversion results. Each time the ADCTL
register is overwritten, this bit is automatically cleared to 0 and a
conversion sequence is started. In the continuous mode, CCF is set
at the end of the first conversion sequence.
Bit 6
—
Unimplemented
Always reads 0
SCAN
—
Continuous Scan Control Bit
When this control bit is clear, the four requested conversions are
performed once to fill the four result registers. When this control bit is
set, conversions are performed continuously with the result registers
updated as data becomes available.
MULT
—
Multiple Channel/Single Channel Control Bit
When this bit is clear, the A/D converter system is configured to
perform four consecutive conversions on the single channel specified
by the four channel select bits CD:CA (bits [3:0] of the ADCTL
register). When this bit is set, the A/D system is configured to perform
Address:
$1030
Bit 7
6
5
4
3
2
1
Bit 0
Read:
CCF
SCAN
MULT
CD
CC
CB
CA
Write:
Reset:
0
0
Indeterminate after reset
= Unimplemented
Figure 10-5. A/D Control/Status Register (ADCTL)