Resets and Interrupts
Interrupts
MC68HC11E Family
—
Rev. 4
Technical Data
MOTOROLA
Resets and Interrupts
121
5.6 Interrupts
The MCU has 18 interrupt vectors that support 22 interrupt sources. The
15 maskable interrupts are generated by on-chip peripheral systems.
These interrupts are recognized when the global interrupt mask bit (I) in
the condition code register (CCR) is clear. The three non-maskable
interrupt sources are illegal opcode trap, software interrupt, and XIRQ
pin. Refer to
Table 5-4
, which shows the interrupt sources and vector
assignments for each source.
Table 5-4. Interrupt and Reset Vector Assignments
Vector Address
Interrupt Source
CCR
Mask Bit
Local
Mask
FFC0, C1
–
FFD4, D5 Reserved
FFD6, D7
—
—
SCI serial system
SCI receive data register full
SCI receiver overrun
SCI transmit data register empty
SCI transmit complete
SCI idle line detect
SPI serial transfer complete
Pulse accumulator input edge
Pulse accumulator overflow
Timer overflow
Timer input capture 4/output compare 5
Timer output compare 4
Timer output compare 3
Timer output compare 2
Timer output compare 1
Timer input capture 3
Timer input capture 2
Timer input capture 1
Real-time interrupt
IRQ (external pin)
XIRQ pin
Software interrupt
Illegal opcode trap
COP failure
Clock monitor fail
RESET
I
RIE
RIE
TIE
TCIE
ILIE
SPIE
PAII
PAOVI
TOI
I4/O5I
OC4I
OC3I
OC2I
OC1I
IC3I
IC2I
IC1I
RTII
None
None
None
None
NOCOP
CME
None
FFD8, D9
FFDA, DB
FFDC, DD
FFDE, DF
FFE0, E1
FFE2, E3
FFE4, E5
FFE6, E7
FFE8, E9
FFEA, EB
FFEC, ED
FFEE, EF
FFF0, F1
FFF2, F3
FFF4, F5
FFF6, F7
FFF8, F9
FFFA, FB
FFFC, FD
FFFE, FF
I
I
I
I
I
I
I
I
I
I
I
I
I
I
X
None
None
None
None
None