
PSD GPLD Primer - PSD6XX/7XX/8XX é Application Note
055
WSi Inc. Fremont CA 800-832-6974 www.wsipsd.com
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0055 |Intr pin 24; "pa4 - Output, GPLD(OMC) combinatorial,Interrupt to MCU
0056 |Device_cs pin 25; "pa3 - Ext Chip Sel, High slew rate
0057 | "pa2 - Address Out, defined in WSIPSD PROPERTY
0058 | "pa1
0059 | "pa0
0060 |
0061 |"**** Port B *******************
0062 |
0063 |
0064 |Key13..Key6 pin istype 'reg'; "pb7-pb0 - Keypad inputs, defined in
0065 | " WSIPSD PROPERTY
0066 |
0067 |"**** Port C *******************
0068 |
0069 | "pc7 - unused
0070 |Key5..Key2 pin istype 'reg'; "pc6-pc3 - Keypad inputs(IMC), defined in WSIPSD
PROPERTY
0071 | "pc2 is dedicated to VSTBY in the PSD6XX
0072 |Key1,Key0 pin istype 'reg'; "pc1-pc0 - Keypad inputs(IMC), defined in WSIPSD
PROPERTY
0073 |
0074 |"**** Port D *******************
0075 |
0076 | "pd2, CSi - PSD chip select
0077 |ClkIn pin 9; "pd1, global clock input
0078 | "pd0, connected to the MCU AS signal
0079 |
0080 |
0081 |"******** DPLD Outputs and other internal node declaration ********
0082 |
0083 |es0,es1,es2,es3,es4,es5,es6,es7,rs0,csiop node; "reserved names
0084 |
0085 |pgr3,pgr2,pgr1,pgr0 node; "reserved names
0086 |
0087 |
0088 |
0089 |"**** User-defined pins and nodes
0090 |
0091 |q1,q0 node istype 'reg'; "State counter bits.
0092 |
0093 |no_key node; "Buried node to reduce number of product terms
0094 | "in equations for q[1,0] and Counter[3..0].
0095 |
0096 |
0097 |"**** This counter will time how long a key is held. A
0098 |"**** WSIPSD PROPERTY statement will define MCU data bus
0099 |"**** alignment and OMC usage
0100 |
0101 |Counter2..Counter0 node istype 'reg';
0102 |
0103 |"**** This reg will hold the initial count for the button
0104 |"**** hold counter. The MCU will only write to this reg once
0105 |"**** at power-up. A WSIPSD PROPERTY statement will define
0106 |"**** MCU data bus alignment and OMC usage
0107 |
0108 |FirstCnt2..FirstCnt0 node istype 'reg';
0109 |
0110 |
0111 |
0112 |"******** DEFINITIONS *********************************************