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參數資料
| 型號： | (Z)PSD813F3R |
| 英文描述： | Multi-Chip-Module to Monolithic Flash PSD(閃速，在系統(tǒng)可編程微控制器外圍器件，0M位閃速存儲器，無SRAM) |
| 中文描述： | 多芯片模塊的單片閃存部門司（閃速，在系統(tǒng)可編程微控制器外圍器件，分位閃速存儲器，無靜態(tài)存儲器） |
| 文件頁數： | 26/38頁 |
| 文件大?。?/td> | 509K |
| 代理商： | (Z)PSD813F3R |
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PSD GPLD Primer - PSD6XX/7XX/8XX é Application Note
055
WSi Inc. Fremont CA 800-832-6974 www.wsipsd.com
26
state control), then the MCU I/O mode should be used instead of driving pins with
OMCs. This preserves OMC resources for other logic.
4. IMC PIN, pin names declared, no pin numbers assigned, edge-latched, port assigned,
read by MCU
status[3..0] pin istype 'reg';
sample_clock pin;
STATUS = status[3..0];
WSIPSD PROPERTY 'DataBus_IMC D[7..4]:status[3..0] PortA';
STATUS.ld = !sample_clock;
The four signals of "status" can be strobed by a free running sample clock as they enter the PSD. To do
this, declare the signals as type 'reg' so the associated IMCs can latch them with the falling edge of
"sample_clock" as shown above. This method provides latched samples of the status signals for the MCU
to read in
csiop
space.
NOTE 1:
Use the WSI PROPERTY statement above only if it is desired to read the four signals of
"status" with the MCU. The PROPERTY statement succinctly aligns the signals to the desired
position on the MCU data bus and assigns the pins of Port A to the associated data bus bits.
NOTE 2:
If it is desired merely to read the logic state of the four signals that comprise "status"
with the MCU asynchronously, it is more direct to use MCU I/O mode instead of
setting up the IMCs as shown above. One would simply reserve the pins in the PSDabel file
and read them at run-time.
NOTE 3:
IMCs can be used without the WSI PROPERTY statement if the MCU does not read
the IMCs. In the example above, maybe it is desired to latch the four signals of "status" with
IMCs on the falling edge of sample_clock so that the signals are synchronized for use with
other PSD logic or as stable state machine inputs. In this case, the PSDabel statements would
look like this:
status[3..0] pin istype 'reg';
sample_clock pin;
STATUS = status[3..0];
STATUS.ld = !sample_clock;
As you can see, no WSI PROPERTY statement is needed. Also, if it is desired to gate the four signals
of "status" through the IMCs as a transparent latch rather than an edge-triggered latch, then
this statement would be used:
STATUS.le = !sample_clock;
5. ADDR OUT, no pin names declared, port assigned
WSIPSD PROPERTY 'Address_Out Aout[7..0]:latched_addr_out[7..0] PortA;
If a PSD is configured in multiplexed mode, this statement will cause the fitter to reserve the pins of Port A
for the demultiplexed least significant MCU address signals. Specifically, latched_addr_out[7..0] will
appear on pins 21,22,23,24,25,27,28, and 29 respectively. Note: At run time, preferably as part of the reset
routine, the MCU must write 0xFF to the control register of Port A in
csiop
space.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ZPSD813F3V-15J | 制造商:WSI 功能描述: |
| ZPSD813F3V-A-15J | 制造商:WSI 功能描述: |
| ZPSD813F4-12JI | 制造商:WSI 功能描述: |
| ZPSD813F4-15J | 制造商:WSI 功能描述: 制造商:STMicroelectronics 功能描述:microcontroller peripheral devices 制造商:STMicroelectronics 功能描述:Flash in-system programmable microcontroller peripheral device |
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