參數(shù)資料
型號(hào): (Z)PSD813F3R
英文描述: Multi-Chip-Module to Monolithic Flash PSD(閃速,在系統(tǒng)可編程微控制器外圍器件,0M位閃速存儲(chǔ)器,無(wú)SRAM)
中文描述: 多芯片模塊的單片閃存部門(mén)司(閃速,在系統(tǒng)可編程微控制器外圍器件,分位閃速存儲(chǔ)器,無(wú)靜態(tài)存儲(chǔ)器)
文件頁(yè)數(shù): 16/38頁(yè)
文件大?。?/td> 509K
代理商: (Z)PSD813F3R
PSD GPLD Primer - PSD6XX/7XX/8XX é Application Note
055
WSi Inc. Fremont CA 800-832-6974 www.wsipsd.com
16
silicon by the fitter utility, all within PSDsoft. OMCs can be used to create combinatorial logic, state
machines, timers, counters, loadable registers, etc.
2.4.1 OMC Operating Modes
Each OMC can be used for either combinatorial or registered logic realization. The basic structure of the
OMC is shown here in Figure 8.
Figure 8 - Output MicroCell (OMC)
The OMC may take input from one of three sources:
Native Product Terms (PTs) from the AND array
Borrowed PTs from unused assets in other OMCs and surrounding logic
Data loaded from MCU data bus (if OMC is used as a register)
The OMC may send output to one or more of three destinations:
I/O port (in some cases, may be one of two I/O port pins that share a single OMC)
Feedback into the AND array (for chaining OMCs or other logic use)
MCU data bus for read operations
The default register type within an OMC is a D type flip-flop with set and reset inputs. T, JK, or SR type
flip-flops can be synthesized from the D type using PSDsoft.
Operations of each OMC register occur using declarations and dot extensions in the PSDabel file (e.g.
istype 'reg', .c, .d, .t, .re, etc.). Although the directive of òistype regó is used in PSDsoft to define a
register, the dot extensions are the controlling force, removing any ambiguity from the design description.
D
CLR
PRE
Q
MUX
MUX
M
U
X
M
U
X
PSDsoft
PSDsoft
OUTPUT MICROCELL (OMC)
PT PRESET (.PR)
FROM AND ARRAY
BORROWED
PTs
PT CLEAR (.RE)
NODE FEEDBACK (.FB)
POLARITY
SELECT,
PSDsoft
PT ALLOCATOR,
DRAWS FROM LOCAL
AND GLOBAL UNUSED
PRODUCT TERMS.
PSDsoft DICTATES.
LENDED
PTs
DATA BIT FROM MCU
DATA BIT TO MCU
INDICATES MCU WRITE TO PARTICULAR
CSIOP OMC REGISTER
MCU OVERRIDES
PT PR DURING
MCU WRITE
(LOAD)
MCU READ OF PARTICULAR
CSIOP OMC REGISTER
OMC
OUTPUT
FROM AND ARRAY
TO AND ARRAY
CHIP LEVEL
SHARED PT
RESOURCES
PSD6XX, 7XX, 8XX
TYPICAL PORT A, B, OR C
OUTPUT MICROCELL
FROM AND ARRAY
NATIVE PTs
ALLOCATED PTs
PT CLOCK (.C)
FROM AND ARRAY
GLOBAL CLOCK (CLKIN)
FROM PLD INPUT BUS
INTE
TO I/O
PORT
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