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參數(shù)資料
| 型號(hào)： | (Z)PSD813F3R |
| 英文描述： | Multi-Chip-Module to Monolithic Flash PSD(閃速，在系統(tǒng)可編程微控制器外圍器件，0M位閃速存儲(chǔ)器，無SRAM) |
| 中文描述： | 多芯片模塊的單片閃存部門司（閃速，在系統(tǒng)可編程微控制器外圍器件，分位閃速存儲(chǔ)器，無靜態(tài)存儲(chǔ)器） |
| 文件頁數(shù)： | 12/38頁 |
| 文件大?。?/td> | 509K |
| 代理商： | (Z)PSD813F3R |
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PSD GPLD Primer - PSD6XX/7XX/8XX é Application Note
055
WSi Inc. Fremont CA 800-832-6974 www.wsipsd.com
12
Do this at run time:
At power on and reset, write 0x88 to the Port
DRIVE
register to set slew rate to high. Bit 3 of the Port A
CONTROL
and
DATA OUT
registers have no effect on this pin. Bit 3 of the Port A
DIRECTION
register
can affect this pin (see OR gate on OE control in Figure 3).
2.2.3.5 Peripheral I/O Mode
MCU bi-directional data port (Port A only).
Although this mode is not used in the sample design in Appendix A, its implementation will be described
here.
Do this in the PSDabel file:
Declare signals names for all eight pins of Port A as follows:
DataPort[7:0] pin 21,22,23,24,25,27,28,29;
Write an equation to enable the active address region of this data port. Use the reserved names PSEL1
and/or PSEL0 as follows (PSEL1 and PSEL0 are ORed together in silicon, see Figure 4):
psel0
=
((Address >= ^h8000) & (Address <= ^h8FFF));
Do this at run time:
Write 0x80 to the PSD
VM
register to enable the data port. The bits of Port A
CONTROL, DATA OUT,
and
DIRECTION
registers have no effect on the data port pins. The direction of the data port is controlled
automatically by the MCU RD and WR functions. Note: it is not recommended to set the
DRIVE
register
bits while operating in Peripheral I/O mode since it is not desirable to change the drive characteristics
(open-drain, slew rate) of one device on the system data bus.
I/O Mode
MCU I/O
GPLD
Address Out
ECSPLD
Peripheral I/O
How to Implement it
PSDabel declaration, run time control
PSDabel logic equation
PSDabel declaration, run time control
PSDabel logic equation
PSDabel declaration, run time control
PSDabel Line # Reference
52, 53, 54
55, 235, 239, 244, 249
123
56, 207
-
Table 2 - I/O Port Mode Summary
2.3 Input MicroCells (IMC)
As shown in Figure 2, each PSD port pin is connected to an IMC as well as an I/O port. We know that the
I/O port can receive a signal from a port pin while the I/O port is in MCU I/O mode or Peripheral I/O
mode. In this section, we will discuss how the IMC can receive a signal from a port pin, and why it is
valuable.
2.3.1 IMC Operating Modes
IMCs are available on each pin of Ports A, B, and C. Each IMC can be represented functionally as shown
in Figure 7.
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