參數(shù)資料
型號(hào)： (Z)PSD813F3R
英文描述： Multi-Chip-Module to Monolithic Flash PSD(閃速，在系統(tǒng)可編程微控制器外圍器件，0M位閃速存儲(chǔ)器，無(wú)SRAM)
中文描述： 多芯片模塊的單片閃存部門司（閃速，在系統(tǒng)可編程微控制器外圍器件，分位閃速存儲(chǔ)器，無(wú)靜態(tài)存儲(chǔ)器）
文件頁(yè)數(shù)： 21/38頁(yè)
文件大?。?/td> 509K
代理商： (Z)PSD813F3R
PSD GPLD Primer - PSD6XX/7XX/8XX é Application Note
055
WSi Inc. Fremont CA 800-832-6974 www.wsipsd.com
21
2.5 General Tips
Here are some tips to keep in mind while designing with the PSD.
2.5.1 Efficient Functional Mapping
The following table contains recommended implementations of various functions.
Desired Function
Candidate PSD
asset
MCU I/O input mode
Comment
Section
Input pin sampled by
MCU directly
Latched input pin to
MCU or AND array
Sampled asynchronously by MCU read.
2.2.3.1
IMC in latched mode
Signal can be latched with IMC edge or
level. MCU can read latched signal. AND
array can use latched signal as logic input.
Defined by PSDabel equations. Signal
passes directly, no latching.
Address signals latched with ALE/AS.
2.3.3.1,
2.3.3.2
Direct input pin to
AND array
Additional MCU
address input pin
IMC in pass-through
mode
IMC in level latched
mode
2.3.3.3
2.3.3.2
Bi-Directional data
port
Output directly from
MCU command to pin
Peripheral I/O mode
Combination of runtime and NVM
configuration.
Simple writes from MCU controls the pin
(state, OE, drive type). No OMC
consumed.
Defined by PSDabel equations (up to 10
PTs). Consumes OMC. MCU can read.
Defined by PSDabel equations
(D,T,JK,SR). Consumes OMC. MCU can
load or read.
Defined by PSDabel equations (up to 10
PTs). Consumes OMC. MCU can read.
Defined by PSDabel equations
(D,T,JK,SR). Consumes OMC. MCU can
load or read.
Prefer ECSpld to conserve OMC, also
ECSPLD is faster
For muxed MCU applications. Provides a
demuxed address to external memory or
peripherals.
Combine modes as shown in text.
2.2.3.5
MCU I/O output
mode
2.2.3.1
Combinatorial Logic
output to pin
Registered Logic
output to pin
GPLD (OMC) output
2.4.3.1.2
GPLD (OMC) output
2.4.3.2.2
Combinatorial internal
node
Registered internal
node
GPLD (OMC)
generates feedback
GPLD (OMC)
generates feedback
2.4.3.1.1
2.4.3.2.1
External Chip Select
ECSPLD or OMC
2.2.3.4
Pass demuxed MCU
addresses to external
device
Combine input and
output modes on
separate pins within
the same port
Address Out mode
2.2.3.3
GPLD (OMCs),
IMCs, MCU I/O
mode, Addr Out
mode, External Chip
Select mode
GPLD (OMCs)
GPLD (OMCs)
GPLD (OMCs) and
IMCs
2.2.3
Counter
Shift register
MCU mailbox
Can chain OMCs and access with MCU.
Can chain OMCs and access with MCU.
OMCs and IMCs can use same pins to
implement a "dual port" register.
2.4.3.2.1
2.4.3.2.2
-
Table 4 - Functional Mapping
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參數(shù)描述
ZPSD813F3V-15J 制造商:WSI 功能描述:
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ZPSD813F4-90J 制造商:WSI 功能描述:
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