參數(shù)資料
型號(hào): V30MZ
英文描述: V30MZ(TM) Hardware (Preliminary) | User's Manual[01/2002]
中文描述: V30MZ(TM)硬件(初步)|用戶手冊(cè)[01/2002]
文件頁數(shù): 36/89頁
文件大?。?/td> 418K
代理商: V30MZ
CHAPTER 3 CPU FUNCTIONS
36
Table 3-2. Segment Registers and Offset Addressing
Segment Register
Offset
Default
Override
PFP
PS
Disabled
SP
SS
Disabled
Effective address (BP base)
PS, DS0, DS1
Effective address (non-BP base)
DS0
PS, SS, DS1
IX in instruction group A (Primitive block transfer instruction,
primitive output instruction, BCD string instruction)
IY in instruction group B (Primitive block transfer instruction,
primitive input instruction, BCD string instruction)
DS1
Disabled
When the default offset is a prefetch pointer (PFP), stack pointer (SP) and index register (IY) in instruction group
B, the segment registers that can be combined are fixed at PS, SS, and DS1 respectively, and other segment
registers cannot be used.
For other default offsets, any segment registers other than the default segment register can be specified by the
segment override prefix.
Figure 3-7 shows the relationship between each segment register, segment and memory space.
Figure 3-7. Relationship between Each Segment Register, Segment and Memory Space
FFFFFH
00000H
Memory space
Program segment
FFFFH
0000H
Stack segment
FFFFH
0000H
Data segment 0
FFFFH
0000H
Data segment 1
FFFFH
0000H
PS
SS
DS0
DS1
V30MZ
Each segment has the following meaning.
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