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| 型號(hào)： | V30MZ |
| 英文描述： | V30MZ(TM) Hardware (Preliminary) | User＇s Manual[01/2002] |
| 中文描述： | V30MZ（TM）硬件（初步）|用戶手冊(cè)[01/2002] |
| 文件頁(yè)數(shù)： | 29/89頁(yè) |
| 文件大?。?/td> | 418K |
| 代理商： | V30MZ |
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CHAPTER 3 CPU FUNCTIONS
29
<3> Binary division
Cleared.
<4> Logical operation
Cleared.
< 5 > Shift/rotate
In the case of a left 1-bit shift/rotate, the status of the overflow flag is as follows depending on the
operation result.
When CY = MSB: Cleared
When CY
≠
MSB: Set
In the case of a right 1-bit shift/rotate, its status is as follows depending on the operation result.
When MSB = next lower bit of MSB: Cleared
When MSB
≠
next lower bit of MSB: Set
In the case of a multi-bit shift/rotate, it is undefined.
(g)
Break flag (BRK)
Only when it is saved to the stack as part of the PSW, it can be set by a memory manipulation instruction,
and becomes valid when restored to the PSW after it is set.
If the BRK flag is set, executing one instruction automatically generates a software interrupt (interrupt vector
1) allowing tracing of one instruction at a time.
(h)
Interrupt enable flag (IE)
IE is set by an EI instruction and the maskable interrupt (INT) is enabled. It is cleared by a DI instruction
and the maskable interrupt (INT) is disabled.
(i)
Direction flag (DIR)
When the DIR flag is set, processing is carried out from the higher addresses to the lower addresses in
block transfer and/or I/O system instructions. When it is cleared, processing is carried out from the lower
addresses to the higher addresses.
(j)
Mode flag (MD)
This is a
μ
PD8080AF emulation function related flag that conforms to the previous V30HL. Since the
V30MZ is not provided with the emulation function, this flag is invalid.
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