參數(shù)資料
型號: TMS320VC203
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: Digital Signal Processors(50ns指令周期, 空閑狀態(tài)CPU全關(guān)斷,先進(jìn)的外圍,多種PLL可選)
中文描述: 數(shù)字信號處理器(50ns的指令周期,空閑狀態(tài)CPU的全關(guān)斷,先進(jìn)的外圍,多種鎖相環(huán)可選)
文件頁數(shù): 35/67頁
文件大?。?/td> 1452K
代理商: TMS320VC203
TMS320C203, TMS320C209, TMS320VC203
DIGITAL SIGNAL PROCESSORS
SPRS025 – JUNE 1995
35
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
Table 16. TMS320C2xx Instruction Set Summary (Continued)
C2xx
MNEMONIC
DESCRIPTION
WORDS/
CYCLES
OPCODE
MSB
LSB
BCND
<
Branch if accumulator
0
2/4/2
1110
0011
Branch Address
0100
0100
Branch on no carry
2/4/2
1100
0011
Branch Address
0000
0001
Branch if no overflow
2/4/2
1110
0011
Branch Address
0000
0010
Branch if accumulator
0
2/4/2
1110
0011
Branch Address
0000
1000
Branch on overflow
2/4/2
1110
0011
Branch Address
0010
0010
Branch if accumulator = 0
2/4/2
1110
0011
Branch Address
1000
1000
CALA
Call subroutine indirect
1/4
1011
1110
0011
0000
CALL
Call subroutine
2/4
0111
1010
Routine Address
1ADD
RESS
CC
Conditional call subroutine
2/4/2
1110
10TP
Routine Address
ZLVC
ZLVC
CMPL
Complement accumulator
1/1
1011
1110
0000
0001
CMPR
Compare auxiliary register with auxiliary register AR0
1/1
1011
1111
0100
01CM
CLRC
Configure block as data memory
1/1
1011
1110
0100
0100
SETC
Configure block as program memory
1/1
1011
1110
0100
0101
Disable interrupt
1/1
1011
1110
0100
0001
DMOV
Data move in data memory
1/1
0111
0111
IADD
RESS
CLRC
Enable interrupt
1/1
1011
1110
0100
0000
IDLE
Idle until interrupt
1/1
1011
1110
0010
0010
IN
Input data from port
2/2
1010
1111
IADD
RESS
16BIT
I/O
PORT
ADR
S
INTR
LACC
Software interrupt
1/4
1011
1110
011I
Load accumulator with shift
1/1
0001
SHFT
1ADD
RESS
LACL
Load accumulator immediate short
1/1
1011
1001
8BIT
CNST
LACT
Load accumulator with shift specified by T register
1/1
0110
1011
IADD
RESS
LACC
Load accumulator long immediate with shift
2/2
1011
1111
16-Bit Constant
1000
SHFT
LAR
Load auxiliary register
1/2
0000
0ARx
IADD
RESS
Load auxiliary register short immediate
1/2
1011
0ARx
8BIT
CNST
MAR
Load auxiliary register pointer
1/1
1000
1011
1000
1ARx
LDP
Load data-memory page pointer
1/2
0000
1101
IADD
RESS
LDP
Load data-memory page pointer immediate
1/2
1011
110P
AGE
P
OINT
LPH
Load high-P register
1/1
0111
0101
IADD
RESS
LAR
Load auxiliary register long immediate
2/2
1011
1111
16-Bit Constant
0000
1ARx
LST
Load status register ST0
Load status register ST1
1/2
1/2
0000
0000
1110
1111
IADD
IADD
RESS
RESS
A
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