參數(shù)資料
型號: TMS320VC203
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: Digital Signal Processors(50ns指令周期, 空閑狀態(tài)CPU全關(guān)斷,先進的外圍,多種PLL可選)
中文描述: 數(shù)字信號處理器(50ns的指令周期,空閑狀態(tài)CPU的全關(guān)斷,先進的外圍,多種鎖相環(huán)可選)
文件頁數(shù): 34/67頁
文件大?。?/td> 1452K
代理商: TMS320VC203
TMS320C203, TMS320C209, TMS320VC203
DIGITAL SIGNAL PROCESSORS
SPRS025 – JUNE 1995
34
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
Table 16. TMS320C2xx Instruction Set Summary
C2xx
MNEMONIC
DESCRIPTION
WORDS/
CYCLES
OPCODE
MSB
LSB
ABS
Absolute value of accumulator
1/1
1011
1110
0000
0000
ADD
Add to accumulator with shift
1/1
0010
SHFT
IADD
RESS
ADDC
Add to accumulator with carry
1/1
0110
000
IADD
RESS
ADD
Add to high accumulator
1/1
0110
0001
IADD
RESS
Add to accumulator short immediate
1/1
1011
1000
8BIT
CNST
Add to accumulator long immediate with shift
2/2
1011
1111
16-Bit Constant
1001
SHFT
ADDS
Add to low accumulator with sign extension suppressed
1/1
0110
0010
IADD
RESS
ADDT
Add to accumulator with shift specified by T register
1/1
0110
0011
IADD
RESS
ADRK
Add to auxiliary register short immediate
1/1
0111
1000
8BIT
CNST
AND
AND with accumulator
1/1
0110
1110
IADD
RESS
AND
AND immediate with accumulator with shift
2/2
1011
1111
16-Bit Constant
1011
SHFT
AND immediate with accumulator with shift of 16
2/2
1011
1110
16-Bit Constant
1000
0001
APAC
Add P register to accumulator
1/1
1011
1110
0000
0100
B
Branch unconditionally
2/4
0111
1001
Branch Address
IADD
RESS
BACC
Branch to address specified by accumulator
1/4
1011
1110
Branch Address
0010
0000
BANZ
Branch on auxiliary register not zero
2/4/2
0111
1011
Branch Address
IADD
RESS
BCND
Branch if TC bit
0
2/4/2
1110
0001
Branch Address
0000
0000
Branch if TC bit = 0
2/4/2
1110
0010
Branch Address
0000
0000
Branch on carry
2/4/2
1110
0011
Branch Address
0001
0001
Branch if accumulator
0
2/4/2
1110
0011
Branch Address
1000
1100
>
Branch if accumulator
0
2/4/2
1110
0011
Branch Address
0000
0100
Branch on I/O status low
2/4/3
1110
0000
Branch Address
0000
0000
Branch if accumulator
0
2/4/2
1110
0011
Branch Address
1100
1100
BIT
Test bit
1/1
0100
BITx
IADD
RESS
BITT
Test bit specified by TREG
1/1
0110
1111
IADD
RESS
BLDD
Block move from data memory to data memory source immediate
2/3
1010
1000
Branch Address
IADD
RESS
Block move from data memory to data memory destination immediate
2/3
1010
1001
Branch Address
IADD
RESS
BLPD
Block move from program memory to data memory
2/3
111
0011
Branch Address
IADD
RESS
A
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