參數(shù)資料
型號(hào)： ST72124J2B7
廠商： 意法半導(dǎo)體
英文描述： 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, ADC, 16-BIT TIMERS, SPI, SCI INTERFACES
中文描述： 8位單電壓閃存，ADC和16位定時(shí)器，SPI和脊髓損傷界面微控制器
文件頁數(shù)： 67/125頁
文件大?。?/td> 776K
代理商： ST72124J2B7
ST72334J/N, ST72314J/N, ST72124J
67/125
16-BIT TIMER
(Cont’d)
STATUS REGISTER (SR)
Read Only
Reset Value: 0000 0000 (00h)
The three least significant bits are not used.
7
Bit 7 =
ICF1
Input Capture Flag 1.
0: No input capture (reset value).
1: An input capture has occurred or the counter
has reached the OC2R value in PWM mode. To
clear thisbit, firstread the SRregister, then read
or write the low byte of the IC1R (IC1LR) regis-
ter.
Bit 6 =
OCF1
Output Compare Flag 1.
0: No match (reset value).
1: The content of the free running counter has
matched the content of the OC1R register. To
clear thisbit, firstread the SRregister, then read
or write the low byte of the OC1R (OC1LR) reg-
ister.
Bit 5 =
TOF
Timer Overflow.
0: No timer overflow (reset value).
1: The freerunning counter rolled over from FFFFh
to 0000h. To clear this bit, first read the SR reg-
ister, then read or write the low byte of the CR
(CLR) register.
Note:
Reading or writing the ACLR register does
not clear TOF.
Bit 4 =
ICF2
Input Capture Flag 2.
0: No input capture (reset value).
1: An input capture has occurred.To clear this bit,
first read the SR register, then read or write the
low byte of the IC2R (IC2LR) register.
Bit 3 =
OCF2
Output Compare Flag 2.
0: No match (reset value).
1: The content of the free running counter has
matched the content of the OC2R register. To
clear thisbit, firstread the SRregister, then read
or write the low byte of the OC2R (OC2LR) reg-
ister.
Bit 2-0 = Reserved, forced by hardware to 0.
INPUT CAPTURE 1 HIGH REGISTER (IC1HR)
Read Only
Reset Value: Undefined
This is an 8-bit read only register that contains the
high part of the counter value (transferred by the
input capture 1 event).
INPUT CAPTURE 1 LOW REGISTER (IC1LR)
Read Only
Reset Value: Undefined
This is an 8-bit read only register that contains the
low part of the counter value (transferred by the in-
put capture 1 event).
OUTPUT
(OC1HR)
Read/Write
Reset Value: 1000 0000 (80h)
This is an 8-bit register that contains the high part
of the value to be compared to the CHR register.
COMPARE
1
HIGH
REGISTER
OUTPUT
(OC1LR)
Read/Write
Reset Value: 0000 0000 (00h)
This is an 8-bitregister that contains the low part of
the value to be compared to the CLR register.
COMPARE
1
LOW
REGISTER
0
ICF1
OCF1
TOF
ICF2
OCF2
0
0
0
7
0
MSB
LSB
7
0
MSB
LSB
7
0
MSB
LSB
7
0
MSB
LSB
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ST72124J2B7/XXX 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, ADC, 16-BIT TIMERS, SPI, SCI INTERFACES
ST72124J2T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, ADC, 16-BIT TIMERS, SPI, SCI INTERFACES
ST72124J2T1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, ADC, 16-BIT TIMERS, SPI, SCI INTERFACES
ST72124J2T1/XXX 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, ADC, 16-BIT TIMERS, SPI, SCI INTERFACES
ST72124J2T3 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, ADC, 16-BIT TIMERS, SPI, SCI INTERFACES
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