參數(shù)資料
型號: ST72124J2B7
廠商: 意法半導(dǎo)體
英文描述: 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, ADC, 16-BIT TIMERS, SPI, SCI INTERFACES
中文描述: 8位單電壓閃存,ADC和16位定時(shí)器,SPI和脊髓損傷界面微控制器
文件頁數(shù): 116/125頁
文件大?。?/td> 776K
代理商: ST72124J2B7
ST72334J/N, ST72314J/N, ST72124J
116/125
MEMORY AND PERIPHERAL CHARACTERISTICS
(Cont’d)
Notes:
1)
Unless otherwise specified, typical data arebased on T
A
=25
°
C and V
DD
-V
SS
=5V. They are given only as design guide-
lines and are not tested.
2)
Data based on characterization results, not tested in production.
3)
Tested in production at T
A
=25
°
C, characterized over the whole temperature range.
4)
ADC Accuracy vs. Negative Injection Current:
For I
=0.8mA, the typical leakage induced inside the die is 1.6
μ
A and the effect on the ADC accuracy is a loss of 1 LSB
for each 10K
increase of the external analog source impedance. This effect on the ADC accuracy has been observed
under worst-case conditions for injection:
- negative injection
- injection to an Input with analog capability, adjacent to the enabled Analog Input
- at 5V V
DD
supply, and worst case temperature.
ADC Analog to Digital Converter (8-bit)
Symbol
Parameter
Conditions
Min
Typ
1)
Max
Unit
f
ADC
Analog control frequency
V
DD
=V
DDA
=5V
4
2)
MHz
|TUE|
OE
GE
|DLE|
|ILE|
V
AIN
I
ADC
t
STAB
Total unadjusted error
4)
Offset error
4)
Gain Error
4)
Differential linearity error
4)
Integral linearity error
4)
Conversion range voltage
A/D conversion supply current
Stabilization time after ADC enable
T
A
=25
°
C,V
DD
=V
DDA
=5V,
3)
f
CPU
=8MHz,f
ADC
=4MHz
1
LSB
-0.5
-0.5
0.5
0.5
0.5
0.5
V
DDA
V
SSA
V
f
CPU
=8MHz, f
ADC
=4MHz
V
DD
=V
DDA
=5V
1
mA
μ
s
μ
s
1/f
ADC
μ
s
1/f
ADC
k
1
t
LOAD
Sample capacitor loading time
1
4
2
8
t
CONV
Hold conversion time
R
AIN
External input resistor
15
2)
R
ADC
C
SAMPLE
Sample capacitor
Internal input resistor
1.5
6
k
pF
OE
GE
1 LSB (ideal)
1LSBideal
VDDA
VSSA
256
=
V
in
(LSB
ideal
)
(1) Example of an actual transfer curve
(2) The ideal transfer curve
(3) End point correlation line
TUE
=Total Unadjusted Error: maximum deviation
between the actual and the ideal transfer curves.
OE
=Offset Error: deviation between the first actual
transition and the first ideal one.
GE
=Gain Error: deviation between the last ideal
transition and the last actual one.
DLE
=Differential Linearity Error: maximum devia-
tion between actual steps and the ideal one.
ILE
=Integral Linearity Error: maximum deviation
between any actual transition and the end point
correlation line.
Digital Result ADCDR
255
254
253
5
4
3
2
1
0
V
SSA
7
6
1
2
3
4
5
6
7
253 254 255 256
(1)
(2)
TUE
DLE
ILE
(3)
V
DDA
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