
SiS5595 PCI System I/O Chipset
Preliminary V2.0 Nov. 2, 1998 41 Silicon Integrated Systems Corporation
3.5.5 INTERFACE REGISTER BLOCK
The Data Acquisition Module internal registers can be accessed through Interface Register
Block located in I/O address space, with its base address relocatable anywhere within the
low 64K I/O space by programming PCI-ISA configuration Register 68h~69h and must be 8-
byte aligned. The Interface Register Block consists of two registers—Index Address Pointer
register and Data register located at base address +05h and base address +06h
respectively.
BASE ADDRESS
+05h
+06h
REGISTER
Index Address Pointer
Data
All accesses to the Data Acquisition Module internal registers must be through the two
registers. First the Index Address Pointer should be written with the offset address of the
internal register, then the actual data read or write transaction can be carried out by reading
or writing to Data register.
3.5.6 INTERNAL REGISTERS
Limit registers set the lower and higher limits for voltages, temperature and fan speed. Note
that there is only lower limit for fan speed. A lower limit is considered to be exceeded if the
reading is less than lower limit, while a higher limit is considered to be exceeded if the
reading is greater than or equal to the higher limit. When the round-robin monitoring process
updates a reading which has exceeded a limit, an IRQ or SMI# can be generated, if the
corresponding Mask bit in NMI Mask register or SMI# Mask register is not disabled. At the
same time, the corresponding interrupt status bit at the Interrupt Status register will be set.
Reading the Interrupt Status register will reset all bits as well as clear outstanding interrupts.
3.6
INTEGRATED REAL TIME CLOCK (RTC)
3.6.1 REAL TIME CLOCK MODULE
The Real Time Clock module in the SiS5595 contains the industrial standard Real Time
Clock, which is compatible to MC146818, and the Automatic Power Control (APC) circuitry
mainly to support the ACPI power control functions. The Real Time Clock part provides a
time-of-day clock with alarm and one hundred year calendar, a programmable periodic
interrupt generator, 112 Bytes of standard CMOS SRAM, and 128 Byes of extended CMOS
SRAM. The Automatic Power Control part provides the software/hardware power up/down
functions. Figure 3.6-1 shows the block diagram of the RTC module.