
SiS5595 PCI System I/O Chipset
Preliminary V2.0 Nov. 2, 1998 33 Silicon Integrated Systems Corporation
3.2.1.3 Legacy Features
Legacy SMI# Events
Legacy SMI# include DAM SMI#, USB SMI#, Periodic SMI#, Wake up SMI# from S1 /S2,
Software SMI#, Serial IRQ SMI#, and GPIOx SMI#. All information are presented in Figure
3.2-9 SCI / SMI# Events Overview
SMI# Command
ACPI register 35h is a SMI# command port. A SMI# will be generated if the APCI register
31h, bit 4 (SMICMD_EN) is enabled and an I/O write to SMI command port is detected. The
SMI# handeler can check the SMI command port to determine which action should be taken.
Periodic SMI# Event
Periodic SMI# can generate SMI# every 16 sec if the PERSMI_EN (ACPI 31h bit 2) is set.
This allows the SMI# handler to periodically give warning to the user for delivering the low
battery message, for instance.
3.2.2 POWER MANAGEMENT UNIT
Basically, the legacy PMU provides three main functions as follows:
3.2.2.1 System Activity Monitoring
The system activity monitor watches, within a specified monitoring period, at the system
events to decide when and to which green state the system will transit into. SiS5595
provides three independent system activity monitors to fulfill the requirement of flexible, and
wide range of today's Green PC application.
Basically, the system activity monitor consists of a system standby timer specifying the
"Monitor -Period", and an Event Recognizer to detect the enabled "Reload Events". Counting
down the timer until expiration mechanizes the "Monitor Period". However, the timer is
reloaded with its initial count, and re-counted down once any of the enabled Reloaded
Events is detected. If the specified Monitor Period is elapsed (certainly without any reload
event detected), the timer is expired with the result of generating SMI# to invoke the SMI#
routine to do any preferred action, such as turning off the screen, transiting the system into
throttling state or sleeping state by throttling the STPCLK# or keeping the STPCLK#
asserted, respectively.
Each Standby Timer is 8-bit wide with 14.318MHz as the Clock source, and provides 4 levels
of granularity, namely 17.8us, 4.58ms, 1.17us, and 5min. Register 79h, 7Ah, and 7Bh of the
PMU configuration space defines the initial count for the system standby timer 0, 1, and 2,
respectively. Bit[7:6], Bit[5:4], and Bit[3:2] of the PMU register 7Ch defines the granularity for
the system standby timer 0, 1, and 2, respectively.
Table 3.2-4 Reload Events for Each
Timer
summarizes the Reload Events that the Event Recognizers in SiS5595 can support.
There are three independent Event Recognizers provided, and their Reload Events can be
defined by programming PMU Register 40h-43h, 44h-47h, and 48h-4Bh, respectively.