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參數(shù)資料
| 型號(hào)： | S5933QE |
| 廠商： | APPLIEDMICRO INC |
| 元件分類(lèi)： | 總線控制器 |
| 英文描述： | PCI BUS CONTROLLER, PQFP160 |
| 封裝： | PLASTIC, QFP-160 |
| 文件頁(yè)數(shù)： | 33/176頁(yè) |
| 文件大小： | 823K |
| 代理商： | S5933QE |
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PASS-THRU OVERVIEW
S5933
For Pass-Thru writes, the S5933 responds immedi-
ately (asserting TRDY#) and transfers the data from
the PCI bus into the Pass-Thru Data Register
(APTD). The S5933 then indicates to the Add-On in-
terface that a Pass-Thru write is taking place and
waits for Add-On logic to read the APTD register and
complete the transfer (assert PTRDY#). Once the
S5933 has captured the data from the PCI bus, the
transfer is finished from the PCI bus perspective, and
the PCI bus becomes available for other transfers.
For Pass-Thru reads, the S5933 indicates to the Add-
On interface that a Pass-Thru read is taking place
and waits for Add-On logic to write the Pass-Thru
Data Register and complete the transfer (assert
PTRDY#). The S5933 completes the cycle when data
is written into the data register. If the Add-On cannot
complete the write quickly enough, the S5933 re-
quests a retry from the initiator. See target-requested
disconnect information.
PCI Pass-Thru Burst Accesses
For PCI Pass-Thru burst accesses, the S5933 cap-
tures the PCI address and determines if it falls into
one of the defined Pass-Thru regions. Accesses that
fall into a Pass-Thru region are accepted by asserting
DEVSEL#. The S5933 monitors FRAME# and IRDY#
on the PCI bus to identify burst accesses. If the PCI
initiator is performing a burst access, the Pass-Thru
status indicators notify Add-On logic.
For Pass-Thru burst writes, the S5933 responds im-
mediately (asserting TRDY#). The S5933 transfers
the first data phase of the burst into the Pass-Thru
Data Register (APTD), and stores the PCI address in
the Pass-Thru Address Register (APTA). The Add-
On interface completes the transfer and asserts
PTRDY#. Every time PTRDY# is asserted by the
Add-On, the S5933 begins the next data phase. The
next data phase is latched into the data register. For
burst accesses, APTA is automatically incremented
by the S5933 for each data phase.
For Pass-Thru burst reads, the S5933 claims the PCI
cycle (asserting DEVSEL#). The request for data is
passed on to Add-On logic and the PCI address is
stored in the APTA register. The Add-On interface
completes the transfer and asserts PTRDY#. The
S5933 then drives the requested data on the PCI bus
and asserts TRDY# to begin the next data phase.
The APTA register is automatically incremented by
the S5933 for each data phase.
PCI Retry Conditions
In some applications, Add-On logic may not be able
to respond to Pass-Thru accesses quickly. In this
situation, the S5933 disconnects from the PCI bus,
signaling a retry. This indicates that the initiator
should try the access again at a later time. This al-
lows other PCI cycles to be run while the logic on the
slow target completes the Pass-Thru access. Ideally,
when the initiator retries the access, the target has
completed the access and can respond to the initia-
tor.
With many devices, particularly memories, the first
access takes longer than subsequent accesses (as-
suming they are sequential and not random). For this
reason, the PCI specification allows 16 clocks to re-
spond to the first data phase of a PCI cycle and 8
clocks for subsequent data phases (in the case of a
burst) before a retry must be requested by the
S5933.
The S5933 also requests a retry if an initiator at-
tempts to burst past the end of a Pass-Thru region.
The S5933 updates the Pass-Thru Address Register
(APTA) for each data phase during bursts, and if the
updated address is not within the current Pass-Thru
region, a retry is requested.
For example, a PCI system may map a 512 byte
Pass-Thru memory region to 0DC000h to 0DC1FFh.
A PCI initiator attempts a four DWORD burst with a
starting address of 0DC1F8h. The first and second
data phases complete (filling the DWORDs at
0DC1F8h and 0DC1FCh), but the third data phase
causes the S5933 to request a retry. This forces the
initiator to present the address 0DC200h on the PCI
bus. If this address is part of another S5933 Pass-
Thru region, the device accepts the access.
PCI Write Retries
When the S5933 requests a retry for a PCI Pass-
Thru write, it indicates that the Add-On is still com-
pleting a previous Pass-Thru write access. The
Pass-Thru Address and Data Register contents
(APTA and APTD) are still required for the previous
Pass-Thru operation and cannot be updated by the
PCI interface until the access completes (the Add-On
asserts PTRDY#).
When the Add-On is busy completing a Pass-Thru
write, the S5933 requests an immediate retry for all
Pass-Thru region accesses, allowing the PCI bus to
perform other operations. PCI Operation Registers
may be accessed while the Add-On is still completing
a Pass-Thru access. Only Pass-Thru region ac-
cesses receive retry requests.
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