- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98071 > S5933QE (APPLIEDMICRO INC) PCI BUS CONTROLLER, PQFP160 PDF資料下載
參數(shù)資料
| 型號(hào)： | S5933QE |
| 廠商： | APPLIEDMICRO INC |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI BUS CONTROLLER, PQFP160 |
| 封裝： | PLASTIC, QFP-160 |
| 文件頁(yè)數(shù)： | 125/176頁(yè) |
| 文件大?。?/td> | 823K |
| 代理商： | S5933QE |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)當(dāng)前第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)
3-61
PCI BUS OPERATION REGISTERS
S5933
Table 3. Interrupt Control/Status Register
Bit
Description
31:24
FIFO and Endian Control.
23
Interrupt asserted. This read only status bit indicates that one or more of the four possible interrupt
conditions is present. This bit is nothing more than the ORing of the interrupt conditions described
by bits 19 through 16 of this register.
22
Reserved. Always zero.
21
Target Abort. This bit signifies that an interrupt has been generated due to the S5933 encountering
a target abort during a PCI bus cycle while the S5933 was the current bus master. This bit operates
as read or write one clear. A write to this bit with the data of “one” will cause this bit to be reset, a write
to this bit with the data of “zero” will not change the state of this bit.
20
Master Abort. This bit signifies that an interrupt has been generated due to the S5933 encountering
a Master Abort on the PCI bus. A master abort occurs when there is no target response to a PCI bus
cycle. This bit operates as read or write one clear. A write to this bit with the data of “one” will cause
this bit be reset, a write to this bit with the data of “zero” will not change the state of this bit.
19
Read Transfer Complete. This bit signifies that an interrupt has been generated due to the completion
of a PCI bus master operation involving the transfer of data from the PCI bus to the Add-On. This
interrupt will occur when the Master Read Transfer Count register reaches zero. This bit operates as
read or write one clear. A write to this bit with the data of “one” will cause this bit to be reset; a write
to this bit with the data of “zero” will not change the state of this bit.
18
Write Transfer Complete. This bit signifies that an interrupt has been generated due to the completion
of a PCI bus master operation involving the transfer of data to the PCI bus from the Add-On. This
interrupt will occur when the Master Write Transfer Count register reaches zero. This bit operates as
read or write one clear. A write to this bit with the data of “one” will cause this bit to be reset; a write
to this bit with the data of “zero” will not change the state of this bit.
17
Incoming Mailbox Interrupt. This bit is set when the mailbox selected by bits 12 through 8 of this
register are written by the Add-On interface. This bit operates as read or write one clear. A write to
this bit with the data of “one” will cause this bit to be reset; a write to this bit with the data as “zero”
will not change the state of this bit.
16
Outgoing Mailbox Interrupt. This bit is set when the mailbox selected by bits 4 through 0 of this register
is read by the Add-On interface. This bit operates as read or write one clear. A write to this bit with
the data of “one” will cause this bit to be reset; a write to this bit with the data of “zero” will not change
the state of this bit.
15
Interrupt on Read Transfer Complete. This bit enables the occurrence of an interrupt when the read
transfer count reaches zero. This bit is read/write.
14
Interrupt on Write Transfer Complete. This bit enables the occurrence of an interrupt when the write
transfer count reaches zero. This bit is read/write.
13
Reserved. Always zero.
12
Enable incoming mailbox interrupt. This bit allows a write from the incoming mailbox register identified
by bits 11 through 8 to produce a PCI interface interrupt. This bit is read/write.
11:10
Incoming Mailbox Interrupt Select. This field selects which of the four incoming mailboxes is to be
the source for causing an incoming mailbox interrupt. [00]b selects mailbox 1, [01]b selects mailbox
2, [10]b selects mailbox 3 and [11]b selects mailbox 4. This field is read/write.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S6A0032 | 16 X 80 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC138 |
| S6A0069 | 16 X 40 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC80 |
| S6A0078 | 34 X 120 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC183 |
| S80296SA40 | 16-BIT, 40 MHz, MICROCONTROLLER, PQFP100 |
| S80486-DX4-75-S-V-8-B | 32-BIT, 75 MHz, MICROPROCESSOR, PQFP208 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S5935 | 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PCI Product |
| S5935_07 | 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PCI Product |
| S59355QRC | 制造商:AppliedMicro 功能描述: |
| S5935QF | 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PCI Product |
| S5935QRC | 制造商:AppliedMicro 功能描述:PCI Master Device 160-Pin PQFP |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。