
Applied Micro Circuits Corporation
6195 Lusk Blvd., San Diego, CA 92121 (619) 450-9333
4-21
PCI CONTROLLER
S5933
DEVICE SPECIFICATION
Response
Size in bytes
[EPROM boot value] 1
00000000h
none - disabled
00000000h or
BIOS missing 2,3
FFFFFFF0h
16 bytes (4 DWORDs)
FFFFFFF0h
FFFFFFE0h
32 bytes (8 DWORDs)
FFFFFFE0h
FFFFFFC0h
64 bytes (16 DWORDs)
FFFFFFC0h
FFFFFF80h
128 bytes (32 DWORDs)
FFFFFF80h
FFFFFF00h
256 bytes (64 DWORDs)
FFFFFF00h
FFFFFE00h
512 bytes (128 DWORDs)
FFFFFE00h
FFFFFC00h
1K bytes (256 DWORDs)
FFFFFC00h
FFFFF800h
2K bytes (512 DWORDs)
FFFFF800h
FFFFF000h
4K bytes (1K DWORDs)
FFFFF000h
FFFFE000h
8K bytes (2K DWORDs)
FFFFE000h
FFFFC000h
16K bytes (4K DWORDs)
FFFFC000h
FFFF8000h
32K bytes (8K DWORDs)
FFFF8000h
FFFF0000h
64K bytes (16K DWORDs)
FFFF0000h
FFFE0000h
128K bytes (32K DWORDs)
FFFE0000h
FFFC0000h
256K bytes (64K DWORDs)
FFFC0000h
FFF80000h
512K bytes (128K DWORDs)
FFF80000h
FFF00000h
1M bytes (256K DWORDs)
FFF00000h
FFE00000h
2M bytes (512K DWORDs)
FFE00000h
FFC00000h
4M bytes (1M DWORDs)
FFC00000h
FF800000h
8M bytes (2M DWORDs)
FF800000h
FF000000h
16M bytes (4M DWORDs)
FF000000h
FE000000h
32M bytes (8M DWORDs)
FE000000h
FC000000h
64M bytes (16M DWORDs)
FC000000h
F8000000h
128M bytes (32M DWORDs)
F8000000h
F0000000h
256M bytes (64M DWORDs)
F0000000h
E0000000h
512M bytes (128M DWORDs)
E0000000h
1. The two most significant bits define bus width for BADR1:4 in Pass-Thru operation (see Section 12.3.1).
2. Bits D3, D2 and D1 may be set to indicate other attributes for the memory space. See text for details.
3. BADR5 register is not implemented and will return all 0’s.
Table 4-23. Read Response (Memory Assigned) to an All-Ones Write Operation to a Base Address Register