參數(shù)資料
型號： S29PL-J60BAW011
廠商： Spansion Inc.
元件分類： DRAM
英文描述： CMOS 3.0 Volt-only, Simultaneous-Read/Write Flash Memory with Enhanced VersatileIO Control
中文描述： CMOS 3V電壓供電，同步讀/寫Flash存儲器并有增強(qiáng)VersatileIO控制
文件頁數(shù)： 23/96頁
文件大小： 827K
代理商： S29PL-J60BAW011
September 22, 2006 S29PL-J_00_A9
S29PL-J
21
D a t a
S h e e t
( A d v a n c e
I n f o r m a t i o n )
10.1.1
Random Read (Non-Page Read)
Address access time (t
ACC
) is equal to the delay from stable addresses to valid output data. The chip enable
access time (t
CE
) is the delay from the stable addresses and stable CE# to valid data at the output inputs. The
output enable access time is the delay from the falling edge of the OE# to valid data at the output inputs
(assuming the addresses have been stable for at least t
ACC
–t
OE
time).
10.1.2
Page Mode Read
The device is capable of fast page mode read and is compatible with the page mode Mask ROM read
operation. This mode provides faster read access speed for random locations within a page. Address bits
Amax–A3 select an 8 word page, and address bits A2–A0 select a specific word within that page. This is an
asynchronous operation with the microprocessor supplying the specific word location.
The random or initial page access is t
ACC
or t
CE
and subsequent page read accesses (as long as the
locations specified by the microprocessor falls within that page) is equivalent to t
PACC
. When CE# (CE1# and
CE#2 in PL129J) is deasserted (=V
IH
), the reassertion of CE# (CE1# or CE#2 in PL129J) for subsequent
access has access time of t
ACC
or t
CE
. Here again, CE# (CE1# /CE#2 in PL129J)selects the device and OE#
is the output control and should be used to gate data to the output inputs if the device is selected. Fast page
mode accesses are obtained by keeping Amax–A3 constant and changing A2–A0 to select the specific word
within that page.
10.2
Simultaneous Read/Write Operation
In addition to the conventional features (read, program, erase-suspend read, erase-suspend program, and
program-suspend read), the device is capable of reading data from one bank of memory while a program or
erase operation is in progress in another bank of memory (simultaneous operation). The bank can be
selected by bank addresses (PL127J: A22–A20, PL129J and PL064J: A21–A19, PL032J: A20–A18) with
zero latency.
The simultaneous operation can execute multi-function mode in the same bank.
Table 10.3
Page Select
Word
A2
A1
A0
Word 0
0
0
0
Word 1
0
0
1
Word 2
0
1
0
Word 3
0
1
1
Word 4
1
0
0
Word 5
1
0
1
Word 6
1
1
0
Word 7
1
1
1
Table 10.4
Bank Select
Bank
PL127J: A22–A20, PL064J: A21–A19, PL032J: A20–A18
Bank A
000
Bank B
001, 010, 011
Bank C
100, 101, 110
Bank D
111
Bank
CE1#
CE2#
PL129J: A21–A20
Bank 1A
0
1
00
Bank 1B
0
1
01, 10, 11
Bank 2A
1
0
00, 01, 10
Bank 2B
1
0
11
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S29PL-J60BAW012 制造商:SPANSION 制造商全稱:SPANSION 功能描述:CMOS 3.0 Volt-only, Simultaneous-Read/Write Flash Memory with Enhanced VersatileIO Control
S29PL-J60BAW013 制造商:SPANSION 制造商全稱:SPANSION 功能描述:CMOS 3.0 Volt-only, Simultaneous-Read/Write Flash Memory with Enhanced VersatileIO Control
S29PL-J60BAW020 制造商:SPANSION 制造商全稱:SPANSION 功能描述:CMOS 3.0 Volt-only, Simultaneous-Read/Write Flash Memory with Enhanced VersatileIO Control
S29PL-J60BAW021 制造商:SPANSION 制造商全稱:SPANSION 功能描述:CMOS 3.0 Volt-only, Simultaneous-Read/Write Flash Memory with Enhanced VersatileIO Control
S29PL-J60BAW022 制造商:SPANSION 制造商全稱:SPANSION 功能描述:CMOS 3.0 Volt-only, Simultaneous-Read/Write Flash Memory with Enhanced VersatileIO Control
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