參數(shù)資料
型號： S1D13706F00A
元件分類： 顯示控制器
英文描述： 320 X 240 PIXELS CRT OR FLAT PNL GRPH DSPL CTLR, PQFP100
封裝： TQFP-100
文件頁數(shù)： 51/171頁
文件大?。?/td> 4940K
代理商： S1D13706F00A
FLASH MEMORY VERSION
7751 Group User’s Manual
19–27
19.2 Serial input/output mode
q Program verify command
Figure 19.2.4 shows the program verify command execution timing.
This command is executed to verify data of address where the program command has been
executed after executing the program command.
The command code “C016” is input at the first transfer.
___
When setting the OE signal to “L” level, data of address where the program command has been
executed is read out and latched to the internal data latch.
___
When returning the OE signal to “H” level and inputting the serial clock, the data which is latched
to the data latch is output externally.
Since the address is internally latched when the program command is executed, there is no need
to input it when the program verify command is executed.
Fig. 19.2.4 Program verify command execution timing
1
00 0000
Verify data output
(Note)
D0
D7
Command code input (C016)
1
tCRPV
SCLK
SDA
OE
BUSY
tWR
tRC
Verify read
Note: When outputting the verify data, the SDA pin is switched for output at the first falling edge of
the serial clock. The SDA pin is switched in the floating state during the th(C-E) period after the
last rising edge of the serial clock (at the 8th bit).
“L”
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