參數(shù)資料
型號： S1D13706F00A
元件分類： 顯示控制器
英文描述： 320 X 240 PIXELS CRT OR FLAT PNL GRPH DSPL CTLR, PQFP100
封裝： TQFP-100
文件頁數(shù)： 36/171頁
文件大?。?/td> 4940K
代理商： S1D13706F00A
40
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
7516 Group (Spec. H)
PULSE WIDTH MODULATION (PWM)
The 7516 group (Spec. H) has a PWM function with an 8-bit reso-
lution, based on a signal that is the clock input XIN or that clock
input divided by 2.
Data Setting
The PWM output pin also functions as port P44. Set the PWM
period by the PWM prescaler, and set the “H” term of output pulse
by the PWM register.
If the value in the PWM prescaler is n and the value in the PWM
register is m (where n = 0 to 255 and m = 0 to 255) :
PWM period = 255 (n+1) / f(XIN)
= 31.875 (n+1)
s
(when f(XIN) = 8 MHz,count source selection bit = “0”)
Output pulse “H” term = PWM period m / 255
= 0.125 (n+1) m
s
(when f(XIN) = 8 MHz,count source selection bit = “0”)
Fig. 40 Timing of PWM period
Fig. 41 Block diagram of PWM function
PWM Operation
When bit 0 (PWM enable bit) of the PWM control register is set to
“1”, operation starts by initializing the PWM output circuit, and
pulses are output starting at an “H”.
If the PWM register or PWM prescaler is updated during PWM
output, the pulses will change in the cycle after the one in which
the change was made.
31.875 m (n+1)
255
s
T = [31.875 (n+1)]
s
PWM output
m: Contents of PWM register
n : Contents of PWM prescaler
T : PWM period (when f(XIN) = 8 MHz, count
source selection bit = “0”)
Data bus
Count source
selection bit
“0”
“1”
PWM
prescaler pre-latch
PWM
register pre-latch
PWM
prescaler latch
PWM
register latch
Transfer control circuit
PWM register
1/2
XIN
Port P44 latch
PWM enable bit
Port P44
PWM prescaler
(XCIN at low-speed mode)
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