參數(shù)資料
型號： S1D13706F00A
元件分類： 顯示控制器
英文描述： 320 X 240 PIXELS CRT OR FLAT PNL GRPH DSPL CTLR, PQFP100
封裝： TQFP-100
文件頁數(shù)： 49/171頁
文件大?。?/td> 4940K
代理商： S1D13706F00A
FLASH MEMORY VERSION
7751 Group User’s Manual
19–25
19.2 Serial input/output mode
q Read command
Figure 19.2.2 shows the read command execution timing.
The command code “0016” is input at the first transfer.
The low–order 8 bits and the high–order 8 bits are input at the second and third transfer.
___
When setting “L” level to the OE signal, the data of the specified address (input address) is read
out and latched up to the internal data latch.
___
When returning “H” level to the OE signal and inputting the serial clock, the data which is latched
up to the data latch is output externally.
Note: When outputting the read data, the SDA pin is switched for output at the first falling edge of the serial clock.
The SDA pin is placed in the floating state during the th(C-E) period after the last rising edge of the serial clock
(at the 8th bit).
tWR
Read
tCH
Command code input(0016)
0 0000 000
Read address input
(Low-order)
A0
A7
A8
A1
5
D0
D7
Read data output
(Note)
tCR
tRC
SCLK
SDA
OE
BUSY
“L”
Read address input
(High-order)
Fig. 19.2.2 Read command execution timing
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