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| 型號： | S19237PB13 |
| 廠商： | APPLIEDMICRO INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | TRANSCEIVER, PBGA255 |
| 封裝： | PLASTIC, BGA-255 |
| 文件頁數(shù)： | 38/60頁 |
| 文件大?。?/td> | 1418K |
| 代理商： | S19237PB13 |
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S19237 – SONET STS-192/10GbE CMOS Transceiver
with ISI Compensation
AMCC Confidential and Proprietary
DS1454
43
Data Sheet
PERFORMANCE SPECIFICATIONS
Table 22. Performance Specifications
Parameter
Min
Typ
Max
Units
Conditions
CSU and CRU VCO Specifications
Nominal VCO Center Frequency (CSU
and CRU)
9.953
10.709
GHz
Frequency difference at which the receive
PLL goes out of lock (CRU_REFCLK
compared to the divided down VCO
clock). LOCKDET is de-asserted when
PLL goes out of lock.
± 350
± 600
ppm
Frequency difference at which receive
PLL goes into lock (CRU_REFCLK com-
pared to the divided down VCO clock).
LOCKDET is asserted 0.5 ms after PLL
goes into lock.
± 220
± 330
ppm
CRU Acquisition phase lock time
500
ms
After the release of RSTB,
with device already powered
up and with a valid
CRU_REFCLK. Guaranteed
but not tested.
SONET Jitter Specifications
SONET Jtol Jitter Tolerance
(SERDATIP/N)
with PAEQUADJ[2:0] = 0,0,0
See Figures
UI (p-p)
10 Hz – 2.4 kHz
(Sinusoidal)
UI (p-p)
2.4 kHz – 24 kHz
(Sinusoidal)
UI (p-p)
24 kHz – 400 kHz
(Sinusoidal)
UI (p-p)
400 kHz – 4 MHz
(Sinusoidal)
UI (p-p)
4 MHz–80 MHz (Sinusoidal)
SONET spec of 0.15 UI is met
across the entire range of
9.95 to 10.709 GHz
SONET Jtr jitter transfer
Internal RSCLK to TSD in RLPTIME
mode with the use of external VCO
See
dB
0 Hz – 120 kHz
dB
> 120 kHz*
Jgen jitter generation
TSD (Normal Mode with 622.08 MHz
CSU_REFCLK)
2
3
mUI
(RMS)
In-lock, for 50 kHz to 80 MHz
B.W.
Jgen Jitter Generation
TSD (Normal Mode with 155.52 MHz
CSU_REFCLK)
4
5
mUI
(RMS)
In-lock, for 50 kHz to 80 MHz
B.W.
* The performance specification is only valid from 0 C to 85 C
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