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參數(shù)資料
| 型號： | S19237PB13 |
| 廠商： | APPLIEDMICRO INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | TRANSCEIVER, PBGA255 |
| 封裝： | PLASTIC, BGA-255 |
| 文件頁數(shù)： | 30/60頁 |
| 文件大?。?/td> | 1418K |
| 代理商： | S19237PB13 |
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36
DS1454
AMCC Confidential and Proprietary
S19237 – SONET STS-192/10GbE CMOS Transceiver
with ISI Compensation
Data Sheet
BER_COUNT[9:0]
MDIO
O
Bit Error Rate Count (BER_COUNT[9:0]). This output holds the bit
error rate being received by the checker with the exponent being
determined by the BER_SELECT[1:0] input. This output can be
accessed through the MDIO bus register. Read BER_COUNT[3:0]
first then BER_COUNT[9:4] for accurate error count information.
BER_OVERFLOW
MDIO
O
Bit Error Rate Overflow (BER_OVERFLOW). Active high. This
output indicates that the BER_COUNT[9:0] has overflowed and bit
error rate range select (BER_SELECT[1:0]) needs to be changed.
This signal is latched high. This output can be accessed through the
MDIO bus register.
TERM_COUNT
MDIO
O
Terminal Count Monitor (TERM_COUNT). This output monitors for
the terminal count of the PRBS checker. The terminal count is set by
the BER_SELECT[1:0] register. See Table 12 for details. This output
can be accessed through the MDIO bus register.
Table 19. Power and Ground Pin Assignments and Descriptions
Pin Name
Level
Pin #
Description
VDD_1.2a V
VDD_1.2a V Group
VDD_CMOS
+1.2 V
B10, D13, F10, G12, H9, H11, J10, J12, J16, L9, L11,
R12
CMOS power supply
VDD_CML_TX
+1.2 V
B1, C1, C2, D2, D3, E1, E2, E3, F2, G1, G2, G4, G5
CML TX power supply
VDD_CML_RX
+1.2 V
H2, H4, H7
CML RX power supply
VDD_ISO_CMOS
+1.2 V
H8
CMOS isolation power supply
VDD_INTF_ISO
+1.2 V
K8
Interface isolation power supply
AVDD_TX
+1.2 V
F5, F6, F7, G6
Transmit analog power supply
VDD_PA_1
+1.2 V
J4, J5, K3, L3, L4, M3, N3, P3, R2
Post-Amplifier 1 power supply
VDD_PA_2
+1.2 V
K6, M5, P4, R4
Post-Amplifier 2 power supply
VDD_1.2b V
VDD_1.2b V Group
AVDD_RXa
+1.2 V
L6, L7, M6, M8
Receive analog power supply
VDD_1.8 V
VDD_1.8 V Group
VDD_18b
+1.8 V
or
+3.3 V
A10, E13, G9, G11, J15, K9, K10, K11, L13, M9, P9, P13
LVCMOS I/O power supply
Table 18. Output Pin Assignments and Descriptions (Continued)
Pin Name
Level
I/O
Pin#
Description
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| S19237PB13-2 | 制造商:AppliedMicro 功能描述: |
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| S19238CBI | 制造商:AppliedMicro 功能描述: |
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| S19250PBIC | 制造商:AppliedMicro 功能描述:10G SERDES EDC/SFI-4 |
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