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參數(shù)資料
| 型號： | S19237PB13 |
| 廠商： | APPLIEDMICRO INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | TRANSCEIVER, PBGA255 |
| 封裝： | PLASTIC, BGA-255 |
| 文件頁數(shù)： | 17/60頁 |
| 文件大?。?/td> | 1418K |
| 代理商： | S19237PB13 |
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24
DS1454
AMCC Confidential and Proprietary
S19237 – SONET STS-192/10GbE CMOS Transceiver
with ISI Compensation
Data Sheet
Each transition of TERM_COUNT signal indicates that
the terminal count has been reached. This signal is ini-
tially set low upon RSTB or when TX_BIST_EN/
RX_BIST_EN are activated. The TERM_COUNT
makes a low to high transition when the first terminal
count is reached. A transition on TERM_COUNT will
set the BER_COUNT[9:0] register to zero depending
upon the BER_RSTB setting. When BER_RSTB is
active (high), BER_OUT[9:0] is not reset after each
terminal count, but instead continues to accrue errors.
The BER_OVERFLOW output will indicate if the
BER_COUNT[9:0] has overflowed. When t he
BER_OVERFLOW goes active, the bit error rate range
select (BER_SELECT[1:0]) needs to be changed. This
signal is active high and is latched high. This signal
mo nito rs the RX c hec ker co un t whe n the
RX_BIST_EN is active and TX checker count when
TX_BIST_EN is active.
MDIO Bus and Address Register
S19237 uses a simple bi-directional two-wire bus for
efficient inter-IC control. This bus reads from and
writes into most of the S19237 control logic. The fol-
lowing are some important features of MDIO bus:
The S19237 has a unique address on the bus
and a simple master/slave relation exists at all
times.
Only two bus lines are required; a Manage-
ment Data Input/Output line (MDIO) and a
Management Data Control line (MDC).
The register mapping has been outlined below. The
serial port interface is based on the IEEE802.3u MII
Management Interface standard. Communication
occurs across two wires and is formatted in frames.
The two wires are clock (MDC) and data (MDIO).
There is no preamble required before a frame as
described in the IEEE standard. At the rising edge of
RSTB, the S19237 loads the device address into a
register from the ADDRESS[4:0] pins and uses it to
decode accesses to its registers. The ADDRESS[4:0]
default is defined by the user. These address bits are
used to uniquely identify each S19237 device if multi-
ple S19237 devices are controlled by a single
microprocessor. Because there are five address lines,
25 = 32 S19237 devices that can be configured by a
single microprocessor. A frame is formatted as shown
in Table 13.
Start of frame: Start of frame is indicated by 01
pattern.
Operation code: For read transaction, 10; For write
transaction, 01.
Device Address: The S19237 compares the five
address bits of device address to the latched address
bits. If they are equal, the S19237 proceeds with the
access. If they are not equal, the S19237 ignores the
access and does not drive the MDIO signal.
Register address: This field is used to select the reg-
isters to be accessed.
Turnaround: The two bits between address field and
data field are used to avoid contention on the MDIO
during a read transaction. For a read transaction,
MDIO should be in tri-state for the first cycle of the
turnaround. The S19237 drives zero during the sec-
ond cycle of the turnaround. For a write transaction,
the system should drive one during the first cycle of
the turnaround and zero during the second cycle of the
turnaround.
Data field: Bits 15:8 are always zero. Bits 7:0 contain
the contents of the selected register. On reads,
reserved register bits will be zero. The first bit transmit-
ted is bit 15.
Idle condition: A final clock puts MDIO back in an idle
state (MDIO is tri-stated and pulled-up).
Table 13. Serial Port Frame Format
START OF
FRAME
OPERATION
CODE
DEVICE
ADDRESS
REGISTER
ADDRESS
TURN
AROUND
DATA
IDLE
Read
01
10
AAAAA
RRRRR
Z0
00000000DDDDDDDD
Z
Write
01
AAAAA
RRRRR
10
00000000DDDDDDDD
Z
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S19237PB13-2 | 制造商:AppliedMicro 功能描述: |
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