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參數(shù)資料
| 型號： | S19237PB13 |
| 廠商： | APPLIEDMICRO INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | TRANSCEIVER, PBGA255 |
| 封裝： | PLASTIC, BGA-255 |
| 文件頁數(shù)： | 10/60頁 |
| 文件大?。?/td> | 1418K |
| 代理商： | S19237PB13 |
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18
DS1454
AMCC Confidential and Proprietary
S19237 – SONET STS-192/10GbE CMOS Transceiver
with ISI Compensation
Data Sheet
The BOLD CELLS denote the default state
User Defined BIST Pattern (BIST_PTRN[15:0]) –
MDIO Register
This is a user defined pattern which is output from the
transmit or the receive pattern generator. This pattern
is loaded on the rising edge of TX_BIST_EN or
RX_BIST_EN. The user defined pattern can be
selected by proper setting of the PRBS_SEL[1:0]. This
input is only accessible through the MDIO bus register.
Pattern Select (PRBS_SELECT[1:0]) –
MDIO Register
The pattern select bits select between the different
PRBS patterns and the user defined pattern. See
Table 11 for details. This input is only accessible
through the MDIO bus register.
The BOLD CELLS denote the default state
Bit Error Rate Range Select (BER_SELECT[1:0]) –
MDIO Register
The bit error rate range select bits selects the appro-
priate bit error rate range for reporting the bit error
rate. See Table 12 for details. This input is only acces-
sible through the MDIO bus register.
The BOLD CELLS denote the default state
Bit Error Rate Reset (BER_RSTB) – MDIO Register
This input selects whether the BER_OUT[9:0] is reset
after each terminal count. When active (high),
BER_OUT[9:0] is not reset after each terminal count
(transition on TERM_COUNT), but instead continues
to accrue errors. This input is only accessible through
the MDIO bus register.
Parallel Input and Output Data Bus Swap
(DATA_SWAP) – MDIO Register
This input reverses the order of the parallel input and
output data bus (PINP/N[15:0] and POUTP/N[15:0]).
This makes routing easier with the 200-Pin MSA and
the 300-Pin MSA connector.
AMCC recommends that DATA_SWAP input be pro-
grammed to logic high when S19237 is used with the
200-pin MSA connector. The S19237 should be
placed on the bottom side of the module when used
with the 200-pin MSA connector.
Table 10. Serial and Reference Loopback Enable
SLPTIME
RLPTIME
XVCO
Mode/ Timing Source
0
Normal Mode/CSU_REFCLK
0
1
Normal Mode/CSU_IN
0
1
0
Not a Valid Mode
0
1
RLPTIME Mode/POCLK through the external VCO
1
X
0
SLPTIME/RSCLK
1
X
1
Not a Valid Mode
Table 11. PRBS Pattern Select
PRBS_SELECT 1
PRBS_SELECT 0
PRBS Pattern
0
User Defined
0
1
Invalid Mode
1
0
PRBS 23
1
PRBS 31
Table 12. Bit Error Rate Range Select
BER_SELECT
Bit Error Rate Exponent/
Terminal Count
[1]
[0]
0
BER_COUNT[9:0] * 10-6
Terminal Count = 106
0
1
BER_COUNT[9:0] * 10-8
Terminal Count = 108
1
0
BER_COUNT[9:0] * 10-10
Terminal Count = 1010
1
BER_COUNT[9:0] * 10-12
Terminal Count = 1012
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相關(guān)代理商/技術(shù)參數(shù) |
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| S19237PB13-2 | 制造商:AppliedMicro 功能描述: |
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