參數(shù)資料
型號(hào)： S19237PB13
廠商： APPLIEDMICRO INC
元件分類： 數(shù)字傳輸電路
英文描述： TRANSCEIVER, PBGA255
封裝： PLASTIC, BGA-255
文件頁(yè)數(shù)： 1/60頁(yè)
文件大小： 1418K
代理商： S19237PB13
Part Number S19237
Revision 5.05 – February 28, 2007
AMCC Confidential and Proprietary
DS1454
1
S19237
SONET STS-192/10GbE CMOS Transceiver with ISI Compensation
Data Sheet
GENERAL FEATURES
Low Power CMOS (1.0 Watts Typ.)
CMOS 0.13 Micron Technology
1.2 V and 1.8 V (or 3.3 V) Power Supply
Complies with Telecordia/ITU-T specifications
Operational from 9.953 Gbps to 10.709 Gbps
Built-In Self Test (BIST) feature
On-chip high-frequency PLLs for clock
generation and clock recovery
16-bit LVDS parallel data path
TX and RX Lock Detect status indicators
Serial and Reference Loop Timing modes
Line and Diagnostic Loopback mode
255 PBGA package
-40°C to 85°C Industrial Temperature Range
Supports Management Data Bus for control I/O
Transmitter Features
Reference frequency of 155.52 or 622.08 MHz
(or equivalent FEC/10 GB Ethernet rate)
155.52 MHz and 622.08 MHz clock outputs
Internal, self-initializing FIFO to decouple
transmit clocks
Programmable TSD output differential swing
Receiver Features
ISI compensation. Tolerates additional 255ps/
nm of chromatic dispersion with an OSNR pen-
alty of 1.0 dB.
Can tolerate up to 24“ of standard FR-4
Adaptive Post-Amplifier offset adjustment
Phase adjust of -0.11 to +0.085 UI
Receive front end can be interfaced with single-
ended or differential TIAs
Input sensitivity of 11 mV p-p (differential mea-
surement) at 10-12 BER
APPLICATIONS
SONET/SDH-based transmission systems
SONET/SDH modules
10 GB Ethernet based transmission systems
Section repeaters
Add Drop Multiplexers (ADM)
Broad band cross-connects
Fiber optic terminators
Fiber optic test equipment
Improve line performance for low extinction
ratio modulator
GENERAL DESCRIPTION
The S19237 SONET/SDH and 10 GB Ethernet MUX/
DeMux chip is a fully integrated serialization/de-serial-
ization SONET STS-192/10 GB Ethernet transceiver
device suitable for cost sensitive applications. The
chip performs all necessary parallel-to-serial and
serial-to-parallel functions in conformance with
SONET/SDH and 10 GB Ethernet transmission stan-
dards. Figure 1, shows a typical network application.
The other application block diagrams are shown in
Figures 2, 3 and 4.
On-chip clock synthesis PLL components are con-
tained in the S19237 chip, allowing the use of a slower
external transmit clock reference. The chip can be
used with 155.52 MHz or 622.08 MHz (or equivalent
FEC/10 GB Ethernet rate) reference clocks, in support
of existing system clocking schemes. The low-jitter
LVDS interface guarantees compliance with the bit-
error rate requirements of the Telecordia and ITU-T
standards. The S19237 is packaged in a 255 PBGA
package, offering designers a small package outline.
Figure 1. System Block Diagram
ORX
OTX
ORX
OTX
AMCC
S19237
16
AMCC'S
KHATANGA,
GANGES,
HUDSON,
MEKONG,
or RUBICON
AMCC
S3390
TIA
Laser
Driver
Laser
Driver
AMCC
S19237
AMCC
S3390
TIA
16
AMCC'S
KHATANGA,
GANGES,
HUDSON,
MEKONG,
or RUBICON
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相關(guān)代理商/技術(shù)參數(shù)
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