![](http://datasheet.mmic.net.cn/260000/PTM1300FBEA_datasheet_15959396/PTM1300FBEA_414.png)
TM1300 Data Book
Philips Semiconductors
A-128
PRODUCT SPECIFICATION
32-bit load
pseudo-op for ld32d(0)
SYNTAX
[ IF rguard ] ld32 rsrc1
→
rdest
FUNCTION
if
rguard
then {
if
PCSW.bytesex = LITTLE_ENDIAN
then
bs
←
3
else
bs
←
0
rdest<7:0>
←
mem[rsrc1+ (3
⊕
bs)]
rdest<15:8>
←
mem[rsrc1+ (2
⊕
bs)]
rdest<23:16>
←
mem[rsrc1+ (1
⊕
bs)]
rdest<31:24>
←
mem[rsrc1+ (0
⊕
bs)]
}
ATTRIBUTES
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
dmem
7
1
No
—
3
4, 5
DESCRIPTION
The
ld32
operation is a pseudo operation transformed by the scheduler into an
ld32d(0)
with the same
argument. (Note: pseudo operations cannot be used in assembly source files.)
The
ld32
operation loads the 32-bit memory value from the address contained in rsrc1 and stores the result in
rdest If the memory address contained in rsrc1is not a multiple of 4, the result of
ld32
is undefined but no exception
will be raised. This load operation is performed as little-endian or big-endian depending on the current setting of the
bytesex bit in the PCSW.
The
ld32
operation can be used to access the MMIO address aperture (the result of MMIO access by 8- or 16-bit
memory operations is undefined). The state of the BSX bit in the PCSW has no effect on MMIO access by
ld32
.
The
ld32
operation optionally takes a guard, specified in rguard If a guard is present, its LSB controls the
modification of the destination register and the occurrence of side effects. If the LSB of rguardis 1, rdestis written and
the data cache status bits are updated if the addressed locations are cacheable. if the LSB of rguard is 0, rdest is not
changed and
ld32
has no side effects whatever.
EXAMPLES
Initial Values
Operation
Result
r10 = 0xd00,
[0xd00] = 0x84, [0xd01] = 0x33,
[0xd02] = 0x22, [0xd03] = 0x11
r30 = 0, r20 = 0xd04,
[0xd04] = 0x48, [0xd05] = 0x66,
[0xd06] = 0x55, [0xd07] = 0x44
r40 = 1, r20 = 0xd04,
[0xd04] = 0x48, [0xd05] = 0x66,
[0xd06] = 0x55, [0xd07] = 0x44
r50 = 0xd01
ld32 r10
→
r60
r60
←
0x84332211
IF r30 ld32 r20
→
r70
no change, since guard is false
IF r40 ld32 r20
→
r80
r80
←
0x48665544
ld32 r50
→
r90
r90 undefined, since 0xd01 is not a multiple of 4
SEE ALSO
ld32d ld32r ld32x st32
st32d h_st32d
ld32