![](http://datasheet.mmic.net.cn/260000/PTM1300FBEA_datasheet_15959396/PTM1300FBEA_324.png)
TM1300 Data Book
Philips Semiconductors
A-38
PRODUCT SPECIFICATION
IEEE status flags from floating-point absolute
value
SYNTAX
[ IF rguard ] fabsvalflags rsrc1
→
rdest
FUNCTION
if
rguard
then
rdest
←
ieee_flags(abs_val((float)rsrc1))
ATTRIBUTES
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
falu
116
1
No
—
3
1, 4
DESCRIPTION
The
fabsvalflags
operation computes the IEEE exceptions that would result from computing the absolute value
of rsrc1 and writes a bit vector representing the exception flags into rdest The argument value is in IEEE single-
precision floating-point format; the result is an integer bit vector. The bit vector stored in rdest has the same format as
the IEEE exception bits in the PCSW. The exception flags in PCSW are left unchanged by this operation. If rsrc1 is
denormalized, the IFZ bit in the result is set.
The
fabsvalflags
operation optionally takes a guard, specified in rguard If a guard is present, its LSB controls
the modification of the destination register. If the LSB of rguardis 1, rdestis written; otherwise, rdestis not changed.
EXAMPLES
Initial Values
Operation
Result
r30 = 0x40400000 (3.0)
r35 = 0xbf800000 (-1.0)
r40 = 0x00400000 (5.877471754e-39)
r45 = 0xffffffff (QNaN)
r50 = 0xffbfffff (SNaN)
r10 = 0,
r55 = 0xff7fffff (–3.402823466e+38)
r20 = 1,
r55 = 0xff7fffff (–3.402823466e+38)
fabsvalflags r30
→
r90
fabsvalflags r35
→
r95
fabsvalflags r40
→
r100
fabsvalflags r45
→
r105
fabsvalflags r50
→
r110
IF r10 fabsvalflags r55
→
r115
r90
←
0x0
r95
←
0x0
r100
←
0x20 (IFZ)
r105
←
0x0
r110
←
0x10 (INV)
no change, since guard is false
IF r20 fabsvalflags r55
→
r120
r120
←
0x0
OFZ
IFZ
INV
OVF
UNF
INX
DBZ
0
1
2
3
4
5
6
7
0
31
0
SEE ALSO
fabsval faddflags readpcsw
fabsvalflags