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Philips Semiconductors
Video In
PRODUCT SPECIFICATION
6-11
6.6
MESSAGE-PASSING MODE
In this mode, VI receives 8-bit message data over the
VI_DATA[7:0] pins. The message data is written in
packed form (four 8-bit message bytes per 32-bit word)
to SDRAM. Message data capture starts on receipt of a
START event on VI_DATA[8]. Message data is received
until EndOfMessage (EOM) is received on VI_DATA[9]
or the receive buffer is full. Note that the VI_SIZE MMIO
register determines the buffer size, and hence maximum
message length. It should not be changed without a VI
(soft) reset.
Figure 6-17
illustrates an example of an 8-byte message
transfer. The first byte (D0) is sampled on the rising edge
of the VI_CLK clock after a valid START was sampled on
the preceding rising clock edge. The last byte (D7) is
sampled on the rising clock edge where EOM is sampled
asserted.
The message passing mode view of the VI MMIO regis-
ters is shown in
Figure 6-15
. The major states are shown
in
Figure 6-18
. The operation is almost identical to the
operation in raw-capture mode, except that transitions to
another active buffer occur upon receipt of EOM rather
than on buffer full. OVERRUN is raised if the second
buffer receives a complete message before a new buffer
is assigned by the DSPCPU.
OVERFLOW is raised if a buffer is full and no EOM has
been received. If enabled, it causes a DSPCPU interrupt.
Since digital interconnection between devices is reliable,
overflow is indicative of a protocol error between the two
TM1300s involved in the exchange (failure to agree on
message size). Detection of overflow leads to total halt of
capture of this message. Capture resumes in the next
buffer upon receipt of the next START event on
VI_DATA[8]. The OVERFLOW flag is sticky and can only
be cleared by writing a ‘1’ to ACK_OVF.
Highway bandwidth error behavior in message passing
mode is identical to that of raw mode.
ACTIVE = BUF2
BUF1FULL
ACTIVE = BUF1
ACTIVE = BUF2
ACTIVE = BUF1
BUF2FULL
BUF1FULL
BUF2FULL
raise OVERRUN*
* OVERRUN is a sticky flag. It is set but does notaf-
fect operation. It can onlybe clearedby software, by
writing a ‘1’ to ACK_OVR.
(See text in
Section 6.5
)
ACK1 & ~ACK2
ACK1 & ACK2
~ACK1 & ACK2
Buffer2 Ful
Bfe1Fl
Buffer1
Full
ACK1
Buffer2
Full
ACK2
RESET
Figure 6-16. VI raw mode major states.
VI_DATA[7:0]
VI_DATA[8]
VI_DATA[9]
VI_CLK
XX
D0
D1
D2
D3
D4
D5
D6
D7
XX
XX
Start of
message
End of
message
Figure 6-17. VI message passing signal example.