Pentium
II Processor at 350 MHz, 400 MHz, and 450 MHz
20
Datasheet
motherboards which support operation at either 66 or 100 MHz, this signal must be pulled up to
3.3 V with a 1/4 W, 200
resistor (as shown in
Figure 4
) and provided as a frequency selection
signal to the clock driver/synthesizer. If the system motherboard is not capable of operating at
100 MHz (e.g., Intel 440FX PCIset and 440LX AGPset-based systems), it should ground this
signal and generate a 66 MHz system bus frequency. This signal can also be incorporated into
RESET# logic on the motherboard if only 100 MHz operation is supported (thus forcing the
RESET# signal to remain active as long as the 100/66# signal is low).
2.9
Test Access Port (TAP) Connection
Due to the voltage levels supported by other components in the Test Access Port (TAP) logic, it is
recommended that the Pentium II processor be first in the TAP chain and followed by any other
components within the system. A translation buffer should be used to connect to the rest of the
chain unless one of the other components is capable of accepting a 2.5 V input. Similar
considerations must be made for TCK, TMS, and TRST#. Two copies of each signal may be
required with each driving a different voltage level.
The Debug Port will have to be placed at the start and end of the TAP chain with the TDI of the
first component coming from the Debug Port and the TDO from the last component going to the
Debug Port. In a two-way MP system, be cautious when including an empty SC 242 connector in
the scan chain. All connectors in the scan chain must have a processor installed to complete the
chain or the system must support a method to bypass the empty connectors; SC 242 terminator
substrates should not connect TDI to TDO in order to avoid placing the TDO pull-up resistors in
parallel. (See
Slot 1 Bus Terminator Card Design Guidelines
(Order Number 243409) for more
details.)
2.10
Maximum Ratings
Table 4
contains Pentium II processor stress ratings only. Functional operation at the absolute
maximum and minimum is not implied nor guaranteed. The processor should not receive a clock
while subjected to these conditions. Functional operating conditions are given in the AC and DC
tables in
Section 2.11
and
Section 2.13
. Extended exposure to the maximum ratings may affect
device reliability. Furthermore, although the processor contains protective circuitry to resist
damage from static electric discharge, one should always take precautions to avoid high static
voltages or electric fields.
Figure 4. 100/66# Pin Example
3.3 Volts
100/66#
CK100
S
L
O
T
2
4
2
1
Processor
Core
GND
Pentium
II Processor
3.3 K
1 K
200
S
C